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參數資料
| 型號： | LTC4268IDKD-1#PBF |
| 廠商： | Linear Technology |
| 文件頁數： | 4/46頁 |
| 文件大小： | 419K |
| 描述： | IC PD HIGH POWER W/CNTRL 32-DFN |
| 產品培訓模塊： | Power over Ethernet |
| 標準包裝： | 52 |
| 類型： | 以太網供電開關（PoE） |
| 應用： | 遠程外設（工業控制，相機，數據訪問） |
| 內部開關： | 是 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFDFN 裸露焊盤 |
| 供應商設備封裝： | 32-DFN（7x4）裸露焊盤 |
| 包裝： | 管件 |
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LTC4268-1
4
42681fc
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
INPUT_SHDN
Shutdown Input Resistance
With Respect to V
PORTN
l 100
kW
V
IH_ILIM
I
LIM_EN
High Level Input Voltage
With Respect to V
PORTN
(Note 13)
High Level Enables Current Limit
l
4
V
V
IL_ILIM
I
LIM_EN
Low Level Input Voltage
With Respect to V
PORTN
(Note 13)
l
1
V
I
VPORTN
V
PORTN
Supply Current
V
PORTN
= 54V
l
3
mA
I
IN_CLASS
IC Supply Current During Classification V
PORTN
= 17.5V, V
NEG
Tied to V
PORTP
(Note 14)
l
0.55
0.62
0.70
mA
DI
CLASS
Current Accuracy During Classification 10mA < I
CLASS
< 75mA
12.5V d V
PORTN
d 21V (Notes 15, 16)
l
?.5
%
R
SIGNATURE
Signature Resistance
1.5V d V
PORTN
d 10.1V, SHDN Tied
to V
PORTN
, IEEE 802.3af Two-Point
Measurement (Notes 8, 9)
l
23.25
26
kW
R
INVALID
Invalid Signature Resistance
1.5V d V
PORTN
d 10.1V, SHDN Tied
to V
PORTP
, IEEE 802.3af Two-Point
Measurement (Notes 8, 9)
10
11.8
kW
V
PWRGD_OUT
Active Low Power Good Output Voltage I = 1mA, V
PORTN
= 54V, PWRGD
Referenced to V
PORTN
l
0.5
V
I
PWRGD_LEAK
Active Low Power Good Output Leakage V
PORT
= 0V, V
PWRGD
= 57V
l
1
礎
V
PWRGD_OUT
Active High Power Good Output Voltage I = 0.5mA, V
PORTN
= 52V, V
NEG
= 4V
PWRGD Referenced to V
NEG
(Note 17)
l
0.35
V
V
PWRGD_VCLAMP
Active High Power Good Voltage
Limiting Clamp
I = 2mA, V
NEG
= 0V, PWRGD Referenced
to V
NEG
(Note 3)
l
12
14
16.5
V
I
PWRGD_LEAK
Active High Power Good Output Leakage V
PWRGD
= 11V With Respect to V
NEG
,
V
NEG
= V
PORTN
= 54V
l
1
礎
R
ON
On-Resistance
I = 700mA, V
PORTN
= 48V, Measured
from V
PORTN
to V
NEG
(Note 16)
l
0.5
0.6
0.8
W
W
I
OUT_LEAK
V
OUT
Leakage
V
PORTN
= 57V, V
PORTP
= SHDN = V
NEG
=
0V (Note 15)
l
1
礎
I
LIM_HI
Input Current Limit, High Level
V
PORTN
= 54V, V
NEG
= 53V I
LIM_EN
Floating (Notes 18, 19)
l
700
750
800
mA
I
LIM_LO
Input Current Limit, Low Level
V
PORTN
= 54V, V
NEG
= 53V
(Notes 18, 19)
l
250
300
350
mA
I
LIM_DISA
Safeguard Current Limit When I
LIM
is
Disabled
V
PORTN
= 54V,
V
NEG
= 52.5V I
LIM_EN
Tied to V
PORTN
(Notes 18, 19, 20)
1.2
1.45
1.65
A
f
OSC
Oscillator Frequency
C
OSC
= 100pF
l
84
100
110
kHz
C
OSC
Oscillator Capacitor Value
(Note 21)
33
200
pF
t
ON(MIN)
Minimum Switch on Time
200
ns
t
ENDLY
Flyback Enable Delay Time
265
ns
t
PGDLY
PG Turn-On Delay Time
200
ns
DC
ON(MAX)
Maximum Switch Duty Cycle
l
85
88
%
V
SYNC
SYNC Pin Threshold
l
1.53
2.1
V
R
SYNC
SYNC Pin Input Resistance
40
kW
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25癈. V
CC
= 14V, SG open, V
CMP
= 1.5V, V
SENSE
= 0V, R
CMP
= 1k, R
tON
= 90k,
R
PGDLY
= 27.4k, R
ENDLY
= 90k, unless otherwise specified.
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