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參數資料
| 型號： | MC4GH02GNMCA-2SA00 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | SAMSUNG MultiMediaCard |
| 中文描述： | 三星多媒體 |
| 文件頁數： | 37/102頁 |
| 文件大小： | 1384K |
| 代理商： | MC4GH02GNMCA-2SA00 |
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MultiMediaCard
TM
37
Sep.22.2005
Revision 0.3
POWER_CLASS
This field contains the 4 bit value of the selected power class for the card. The power classes are defined in Table . The
host should be responsible of properly writing this field with the maximum power class it allows the card to use. The card
uses this information to, internally, manage the power budget and deliver an optimized performance.
This field is 0 after power-on or software reset.
HS_TIMING
This field is 0 after power-on, or software reset, thus selecting the backwards compatibility interface timing for the card. If
the host writes 1 to this field, the card changes its timing to high speed interface timing (refer to Chapter 5.4.8)
BUS_WIDTH
It is set to ‘0’ (1 bit data bus) after power up and can be changed by a SWITCH command.
5.5.5 RCA Register
The writable 16-bit relative card address register carries the card address assigned by the host during the card identifica-
tion. This address is used for the addressed host-card communication after the card identification procedure. The default
value of the RCA register is 0x0001. The value 0x0000 is reserved to set all cards into the
Stand-by State
with CMD7.
5.5.6 DSR Register
The 16-bit driver stage register can be optionally used to improve the bus performance for extended operating conditions
(depending on parameters like bus length, transfer rate or number of cards). The CSD register carries the information
about the DSR register usage. The default value of the DSR register is 0x404.
Bits
Description
[7:4]
Reserved
[3:0]
Card power class code (See Table 5-2
9
)
Value
Bus Mode
255-3
Reserved
2
8 bit data bus
1
4 bit data bus
0
1 bit data bus
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