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| 型號： | MPC823 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Communication Processor Module |
| 中文描述： | 通信處理器模塊 |
| 文件頁數(shù)： | 14/74頁 |
| 文件大小： | 234K |
| 代理商： | MPC823 |
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Communication Processor Module
16-392
MPC823 REFERENCE MANUAL
MOTOROLA
S
C
1
P
MAX_IDL—Once a character of data is received on the line, the SMCx UART controller
starts counting any idle characters received. If a MAX_IDL number of idle characters is
received before the next data character, an idle timeout occurs and the buffer closes.
This, in turn, produces an interrupt request to the core to receive the data from the
buffer. MAX_IDL provides a convenient way to demarcate frames in SMCx UART
mode. But if you do not want to use MAX_IDL, you must program MAX_IDL to 0x0000
and the buffer will never close, regardless of the number of idle characters received.
The number of bits in an idle character is calculated as follows—1 + character data
length (5 to 14) + 1 (if parity bit is used) + number of stop bits (1 or 2). For example, for
a character data length of 8, no parity, and 1 stop bit, the idle character length is 10 bits.
IDLC—This value is used by the RISC microcontroller to store the current idle counter
value in the MAX_IDL timeout process. IDLC is a down-counter that you do not need to
initialize or access.
BRKLN—This value is used to store the length of the last break character received and
is the bit length of that character. For example, if the receive pin is low for 257 bit times,
BRKLN shows the value 0x0101 and its accuracy comes within one character unit of
bits. For 8 data bits, no parity, 1 stop bit, and 1 start bit, BRKLN is accurate within 10
bits.
BRKEC—This counter counts the number of break conditions that occur on the line.
One break condition can last for hundreds of bit times, yet this counter is only
incremented once during that period.
BRKCR—This value indicates when the SMCx UART controller sends a break
character sequence after a
STOP TRANSMIT
command is issued. The number of
break characters sent by the SMCx UART controller is determined by the value in
BRKCR. For 8 data bits, no parity, 1 stop bit, and 1 start bit, each break character is 10
bits long and consists of all zeros.
R_MASK—This value is a temporary bit mask used internally by the SMCx UART
controller.
16.11.6.5 PROGRAMMING THE SMCx UART CONTROLLER.
The SMCx UART
controller’s data structure supports multibuffer operation and allows you to transmit break
and preamble sequences. Overrun, parity, and framing errors are reported via the buffer
descriptors. In its simplest form, the SMCx UART controller functions in a character-oriented
environment. Each character is transmitted with the stop bits and parity that you configure.
Characters are received into separate 1-byte buffers. A maskable interrupt can be
generated when each buffer is filled.
Many applications may want to take advantage of the message-oriented capabilities that the
SMCx UART controller supports through linked buffers for reception or transmission. You
can handle data in a message-oriented environment and work on entire messages rather
than on a character-by-character basis. A message can span several linked buffers and
each one can be transmitted and received as a linked list of buffers without any intervention
from the core, which makes it easy to program and saves processor overhead. In a
message-oriented environment, the idle sequence is used as the message delimiter. The
transmitter can generate an idle sequence before starting a new message and the receiver
can close a buffer when an idle sequence is found.
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