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參數資料
| 型號： | TLV320AIC36IZQE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, VFBGA-80 |
| 文件頁數： | 131/165頁 |
| 文件大小： | 1895K |
| 代理商： | TLV320AIC36IZQE |
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DA(6)
DA(0)
RA(7)
RA(0)
D(7)
D(0)
Start
(M)
7-bitDevice Address
(M)
Write
(M)
Slave
Ack
(S)
8-bitRegister Address
(M)
Slave
Ack
(S)
8-bitRegisterData
(M)
Stop
(M)
Slave
Ack
(S)
SDA
SCL
(M)=>SDA ControlledbyMaster
(S)=>SDA ControlledbySlave
Start
(M)
7-bitDevice Address
(M)
Write
(M)
Slave
Ack
(S)
8-bitRegister Address
(M)
Slave
Ack
(S)
SDA
SCL
7-bitDevice Address
(M)
Read
(M)
Slave
Ack
(S)
DA(6)
DA(0)
RA(7)
RA(0)
DA(6)
DA(0)
D(7)
D(0)
8-bitRegisterData
(S)
Stop
(M)
Master
No Ack
(M)
Repeat
Start
(M)
(M)=>SDA ControlledbyMaster
(S)=>SDA ControlledbySlave
SBAS387A – MAY 2009 – REVISED JUNE 2010
www.ti.com
After the master issues a START condition, it sends a byte that selects the slave device for
communication. This byte is called the address byte. Each device on an I2C bus has a unique 7-bit
address to which it responds. (Slaves can also have 10-bit addresses; see the I2C specification for
details.) The master sends an address in the address byte, together with a bit that indicates whether it
wishes to read from or write to the slave device.
Every byte transmitted on the I2C bus, whether it is address or data, is acknowledged with an
acknowledge bit. When a master has finished sending a byte (eight data bits) to a slave, it stops driving
SDA and waits for the slave to acknowledge the byte. The slave acknowledges the byte by pulling SDA
LOW. The master then sends a clock pulse to clock the acknowledge bit. Similarly, when a master has
finished reading a byte, it pulls SDA LOW to acknowledge this to the slave. It then sends a clock pulse to
clock the bit. (Remember that the master always drives the clock line.)
A not-acknowledge is performed by simply leaving SDA HIGH during an acknowledge cycle. If a device is
not present on the bus, and the master attempts to address it, it will receive a not
acknowledge because
no device is present at that address to pull the line LOW.
When a master has finished communicating with a slave, it may issue a STOP condition. When a STOP
condition is issued, the bus becomes idle again. A master may also issue another START condition. When
a START condition is issued while the bus is active, it is called a repeated START condition.
The TLV320AIC36 can also respond to and acknowledge a General Call, which consists of the master
issuing a command with a slave address byte of 00H. This feature is disabled by default, but can be
enabled using Page 0, Register 34, Bit D(5).
Figure 5-46. I2C Write
Figure 5-47. I2C Read
In the case of an I2C register write, if the master does not issue a STOP condition, then the device enters
auto-increment mode. So in the next eight clocks, the data on SDA is treated as data for the next
incremental register.
Similarly, in the case of an I2C register read, after the device has sent out the 8-bit data from the
addressed register, if the master issues a ACKNOWLEDGE, the slave takes over control of SDA bus and
transmit for the next eight clocks the data of the next incremental register.
5.18 Power Management Unit
The allowed voltage supply ranges for the TLV320AIC36 analog blocks are 1.4 V to 1.8 V and –1.4 V to
–1.8V. To ease system-level design, a charge pump and three low-dropout regulators (LDOs) are
68
APPLICATION INFORMATION
Copyright 2009–2010, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC36
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| TLV320DAC23 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO AUDIO D/A CONVERTER, 8-TO 96KHZ WITH INTERGRATED HEADPHONE AMPLIFIER |
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