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參數資料
型號： TLV320AIC36IZQE
廠商： TEXAS INSTRUMENTS INC
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PBGA80
封裝： 5 X 5 MM, GREEN, PLASTIC, VFBGA-80
文件頁數： 139/165頁
文件大小： 1895K
代理商： TLV320AIC36IZQE
www.ti.com
SBAS387A – MAY 2009 – REVISED JUNE 2010
Table 5-22. Interrupt Sources (continued)
Left ADC Overflow Flag
ADC engine
DAC Barrel Shifter Output Overflow
DAC engine
Right DAC Overflow
DAC engine
Left DAC Overflow
DAC engine
Right DAC Signal Power is above Signal Threshold of DRC
DAC engine
Left DAC Signal Power is above Signal Threshold of DRC
DAC engine
ADC MAC Engine Auxiliary Interrupt Port Output
ADC engine
ADC MAC Engine Standard Interrupt Port Output
ADC engine
Right ADC Signal Power Lesser than Noise Threshold for Right AGC.
ADC engine
Left ADC Signal Power Greater than Noise Threshold for Left AGC.
ADC engine
DAC MAC Engine Auxiliary Interrupt Port Output
DAC engine
DAC MAC Engine Standard Interrupt Port Output
DAC engine
Over current on VDD_ADC_LDO
Power Control
Over current on VSS_DAC_LDO
Power Control
Over current on VDD_DAC_LDO
Power Control
Power good on VDD_ADC_LDO
Power Control
Power good on VSS_DAC_LDO
Power Control
Power good on VDD_DAC_LDO
Power Control
Combined Rec amp/headphone short circuit
Short Circuit
Left headphone open circuit detect
Headphone detection
Right headphone open circuit detect
Headphone detection
Left receiver open circuit detect
Receiver detection
Right receiver open circuit detect
Receiver detection
Hook open circuit detect
Hook detection
Microphone bias detected long pulse
Headset Detection
Microphone bias detected short pulse
Headset Detection
INT1 and INT2 interrupt groups may be routed to the GPIO1, GPIO2, GPIO3, GPIO4, GPIO5, or GPIO6
pins with the active-state formats as described in the Page 0 Control Registers 120 - 125.
Interrupt sources not enabled for either the INT1 or INT2 group will still provide sticky bit and real-time
status information accessible using the I2C interface but they will not assert device pins. This is useful for
monitoring interrupt source status without using an actual interrupt pin.
5.20 Detailed Application Example
################################################ # Example script for the ADC and DAC data
paths # Assumes Mclk(input)=11.2896 MHz, Wclk(input) =fs=44.1kHz, Bclk(input)=2.8224 MHz # I2S
data, 24bits, BCLK, WCLk are inputs # mic1 and mic2 are fully differential inputs # HPR, HPL
are single ended headphone outputs # LOR,LOL are fully differential line outputs
############################################################ # software reset w 30 00 00 w 30
01 01 w 30 01 00 # PMU CODE ############################################################ #
charge pump on, cpclk=MCLK (71=01) , cpclk/12 (72=73=0b) w 30 00 02 w 30 71 01 w 30 72 0b w 30
73 0b # turn on ADC ,DAC LDO (74=00), no current limit (76=00), # short ckt protect, ADC=1.75V,
LDO BGAP=on (77=00) # DAC=+-1.75 (78=33), +-1.65 (78=22), +-1.5 (78=11), +-1.4 (78=00) w 30 00
02 w 30 74 00 w 30 76 00 w 30 77 00 w 30 78 22 # CLOCK CODE
############################################################ # clocking settup, see fig. 5-33
clock dist tree # no pll: 04=00,05=00,0b=81,12=81 # pll: 04=08,05=91,0b=88,12=88 #
CODEC_CLKIN=PLL_CLK, PLL_CLKIN=MCLK_PIN (04=08) w 30 00 00 w 30 04 08 # PLL=R*J.D/P, # PLL on,
P=1,R=1, (05=91) w 30 05 91 # PLL J.D (06=J, 07,08=D) w 30 06 08 w 30 07 00 w 30 08 00 # DAC
CLOCK CODE ############################################################ # NDAC power up and div
by 8 (0B=88), div by 16 (0B=90) w 30 0B 88 # MDAC power up and div by 2 (0C=82) w 30 0C 82 #
DAC OSR=128 (0D, 0E=80), OSR=64 (0E=40) w 30 0D 00 w 30 0E 80 # IDAC, DAC Mac instructions per
FS, only used for custom filters #w 30 0F 40 # DAC inter ratio for digital filters, only used
for custom filters #w 30 10 08 # ADC CLOCK CODE
############################################################ # NADC power up and div by 8
(12=88) w 30 12 88 # MADC power up and div by 2 (13=82) w 30 13 82 # ADC OSR=128 (14=80), w 30
14 80 # IADC, ADC MAC instructions per FS, only used for custom filters #w 30 15 5E # ADC dec
Copyright 2009–2010, Texas Instruments Incorporated
APPLICATION INFORMATION
75
Product Folder Link(s): TLV320AIC36
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相關代理商/技術參數
參數描述
TLV320AIC36IZQER 功能描述:接口—CODEC Low Pwr Stereo Aud Codec RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
TLV320ALC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:Evaluation Platform for the TLV320ALC23 Stereo Audio CODEC and TLV230DAC23 Stereo DAC
TLV320ALC31 制造商:BB 制造商全稱:BB 功能描述:LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
TLV320DA26IRHBG4 功能描述:音頻數/模轉換器 IC Lo-Pwr Ster DAC w/Hdphn/Spkr Amp RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel
TLV320DAC23 制造商:TI 制造商全稱:Texas Instruments 功能描述:STEREO AUDIO D/A CONVERTER, 8-TO 96KHZ WITH INTERGRATED HEADPHONE AMPLIFIER
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