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| 型號： | TLV320AIC36IZQE |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, VFBGA-80 |
| 文件頁數(shù)： | 137/165頁 |
| 文件大小： | 1895K |
| 代理商： | TLV320AIC36IZQE |
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SBAS387A – MAY 2009 – REVISED JUNE 2010
5.19.1.3 Sampling Rate and Debounce Period Control
The low frequency oscillator and detect dividers 1 and 2 provide clock generation for the circuit. When
enabled, the LF oscillator provides a nominal frequency of 1MHz to detect divider 1, which in turn provides
a clock source to detect divider 2. The detect divider 2 rate is the sampling rate of the ADC and the clock
source for the detect debouncers. Detect divider 1 is the clock source for the SAR ADC.
The short and long detect debouncers are programmed separately and can generate an interrupt after
detecting a stable window value (0–7) for a minimum number of divider 2 periods. Because one window
will always correspond to a no-buttons pressed ADC value, interrupts generated from this window are
useful for detecting button releases. The short and long debouncers are identical in function but can be
programmed to different values.
5.19.1.4 Application Programming Example – Interrupt Driven
This example register initialization assumes four buttons with raw ADC values of 3, 9, 16, and 23 are
required. Automatic button sampling will be enabled at a rate of 50 Hz and separate interrupts for short
and long pulses of 400 and 800 ms will be generated on INT1 and INT2 respectively. INT1 and INT2 will
be mapped to GPIO1 and GPIO2 respectively.
w 30 00 01 # Change to page 1 w 30 33 60 # Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w
30 70 00 # Enable LF oscillator (1MHz nominal) w 30 15 C8 # Detect divider 1 set to 200 decimal
(1MHz/200) = 5KHz w 30 16 64 # Detect divider 2 set to 100 decimal (5KHz/100) = 50Hz w 30 14 88
# Enable both detect dividers w 30 17 80 # Enable continuous detection mode w 30 1C 86 # Set
and enable threshold 1 to 6 (between 3 and 9) w 30 1D 8C # Set and enable threshold 2 to 12
(between 9 and 16) w 30 1E 94 # Set and enable threshold 3 to 20 (between 16 and 23) w 30 1F 99
# Set and enable threshold 4 to 25 (between 23 and open) w 30 20 00 # Disable threshold 5 w 30
21 00 # Disable threshold 6 w 30 22 00 # Disable threshold 7 w 30 1A 14 # Set short pulse
duration (1/50Hz) * 20 = 400ms w 30 18 80 # Enable short pulse detection w 30 1B 28 # Set long
pulse duration (1/50Hz) * 40 = 800ms w 30 19 80 # Enable long pulse detection w 30 00 00 #
Change to page 0 w 30 34 01 # Enable short detect interrupt to INT1 w 30 35 02 # Enable long
detect interrupt to INT2 w 30 78 14 # Map INT1 to GPIO1 pin w 30 79 20 # Map INT2 to GPIO2 pin
Upon GPIO1 interrupt, read Page 2, Register 0x18 for the short pushbutton value and write 0x01 to page
0 Reg 0x32 to clear the interrupt.
Upon GPIO2 interrupt, read Page 2, Register 0x19 for the long pushbutton value and write 0x02 to page 0
Reg 0x32 to clear the interrupt.
5.19.1.5 Application Programming Example – On-Demand Detect Sampling – Raw ADC
This example provides a fast, raw ADC sample of the detect pin. This feature is useful for determining the
ADC code for a corresponding resistor value. No windowing or de-bouncing is performed in this mode.
w 30 00 01 # Change to page 1 w 30 33 60 # Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w
30 70 00 # Enable LF oscillator (1MHz nominal) w 30 15 01 # Detect divider 1 set to 1 decimal
(1MHz/1) = 1MHz w 30 14 80 # Enable detect divider 1 w 30 17 20 # Initiate on-demand ADC sample
# Poll page 2 Reg 0x17, bit 5 for a 0 (1=in progress; 0=done) # When done, read page 2 Reg
0x17, bits 4-0 for raw ADC code w 30 70 01 # Disable LF oscillator
5.19.1.6 Application Programming Example – On-Demand Detect Sampling – Windowed
This example provides a fast, windowed ADC sample of the detect pin. This feature is useful for software
initiated button detects. No de-bouncing is performed in this mode.
# Perform these steps only at system initialization w 30 00 01 # Change to page 1 w 30 33 60 #
Power up EXT_MICBIAS w 30 00 02 # Change to page 2 w 30 15 01 # Detect divider 1 set to 1
decimal (1MHz/1) = 1MHz w 30 16 01 # Detect divider 2 set to 1 decimal (1MHz/1) = 1MHz # (Using
the window values from the previous example) w 30 1C 86 # Set and enable threshold 1 to 6
(between 3 and 9) w 30 1D 8C # Set and enable threshold 2 to 12 (between 9 and 16) w 30 1E 94 #
Set and enable threshold 3 to 20 (between 16 and 23) w 30 1F 99 # Set and enable threshold 4 to
25 (between 23 and open) w 30 20 00 # Disable threshold 5 w 30 21 00 # Disable threshold 6 w 30
22 00 # Disable threshold 7 w 30 18 00 # Disable short pulse detection # Perform these steps
only at on-demand time w 30 70 00 # Enable LF oscillator (1MHz nominal) w 30 14 88 # Enable
detect divider 1 and 2 w 30 17 20 # Initiate on-demand ADC sample # Poll page Reg 0x17, bit 5
for a 0 (1=in progress; 0=done) # When done, read page 2 Reg 0x18, bits 6-4 for window number w
30 70 01 # Disable LF oscillator
Copyright 2009–2010, Texas Instruments Incorporated
APPLICATION INFORMATION
73
Product Folder Link(s): TLV320AIC36
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