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參數資料
| 型號： | TPS65820RSHTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, QFN-56 |
| 文件頁數： | 21/98頁 |
| 文件大小： | 2290K |
| 代理商： | TPS65820RSHTG4 |
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SCLK
...
SDAT
Slave Address
hA0
Slave Address
hA1
Register
Address
hCMD
..
A6
R0
R7
R/W
A0
0
Start
...
..
D0
D7
R/W
A0
A6
1
Slave
Drives
theData
bqDATA
MasterDrives
ACKandStop
RepeatedStart, canbereplacedbya
STOP andSTART
..
SCLK
...
SDAT
Slave Address
hA0
HostSends
Data
hDATA
Register
Address
hCMD
...
A6
R6
R5
R0
D7
D6
D5
D0
R7
R/W
A0
A4
A5
0
P
Start
bqA
hA
P
S
bqA
ACK
Valid Write Sequences
One-Byte Write
SLVS663B – MAY 2006 – REVISED APRIL 2008 .............................................................................................................................................................. www.ti.com
The I2C write protocol is similar to the read, without the need for a repeated start and bus being set in write
mode. In a WRITE it is not necessary to end each 1 byte WRITE command with a STOP, a START has the
same effect (repeated start).
Figure 25. I2C read and write operations
The host can complete a READ or a WRITE sequence with either a STOP or a START.
The TPS65820 always ACKs its own address. If the CMD points to an allowable READ or WRITE address, the
bq writes the address into its RAM address register and sends an ACK. If the CMD points to a non-allowed
address, bq does NOT write the address into its RAM address register, and sends an NACK.
S
hA0
bqA
S
hA0
bqA
hCMD
bqA
S
hA0
bqA
hCMD_N
bqN
The data is written to the addressed register when the bq ACK ending the one-byte write sequence is received.
The host can cancel a WRITE by sending a STOP or START before the trailing edge of the bq ACK clock pulse.
S
hA0
bqA
hCMD
bqA
hDATA
bqA
28
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS65820
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