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參數資料
| 型號： | TPS65820RSHTG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 8-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC56 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, QFN-56 |
| 文件頁數： | 25/98頁 |
| 文件大小： | 2290K |
| 代理商： | TPS65820RSHTG4 |
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FUNCTIONALITY REFERENCE GUIDE – HOST INTERFACE AND SYSTEM SEQUENCING
INT
SCLK
TRSTPWON
SYS_IN
HOST INTERFACE
ANDSEQUENCING
OUT
A 1
HOST
TPS65820
A1
CTRSTPWON
210kW
R6
R1
100kW
C16
100nF
R4100k
W
R32k
W
R22k
W
0.1 F
m
R5100k
W
I2CENGINE
INTERRUPT
CONTROLLER
STATEMACHINE
ANDRESET
CONTROLLER
www.ti.com .............................................................................................................................................................. SLVS663B – MAY 2006 – REVISED APRIL 2008
INTERRUPT CONTROLLER, OPEN-DRAIN OUTPUT (INT)
System Parameters Monitored by Interrupt Controller
Power up
default
Supply Output
System
Charger Status
Input and Output
Power Good Fault
Status
ADC status
Transition
Power Transition
Detection(1)
Modification
Charge: Pre
Fast
SM1,
ADC conversion end
Thermal fault or
Done
AC detected: yes
no
SM2,
ADC
GPIO1 ,2
DPPM:on
off
USB detected: yes
no
SM3,
Input out of range
configured as
Charge suspend: on
Input OVP: yes
no
All interrupt
LDO1, LDO2,
External resistive
external interrupt
off
System power: AC
controller
LDO3, LDO4,
load connected to
request
Thermal foldback: on
USB
inputs set to
LDO5
ANLG1
off
non-masked
Can be masked Individually
Can be masked as a group via a single I2C mask
via I2C. Blanked during
Can be masked individually via I2C
register bit
initial power up
(1)
For all supplies (except) for SM3 an output fault is detected if the output voltage is below 90% of the programmed regulation voltage. In
the SM3 converter an output fault indicates that the output OVP threshold was reached.
EVENTS TRIGGERING TPS65820 OPERATING MODE CHANGES
EVENT
POWER GOOD FAULT
THERMAL
HARDWARE
SOFTWARE
DETECTION(1)
FAULT
RESET
How transition is
Integrated regulator output
Internal IC junction
Using HOT_RST control
I2C register control bit
triggered
voltage below target value:
temperature
pin
SM1, SM2, SM3, LDO1, LDO2,
LDO3, LDO4, LDO5
Operating mode
Sets Sleep mode or starts a
Sets sleep mode when
Generates external host
change
new power-up cycle when
thermal fault is detected
reset pulse at pin
power good fault is detected
RESPWON when
RESPWON when I2C
(see state machine diagram).
HOT_RST=LO.
control bit is set.
Power good fault detection
Input and Battery power
Pulse duration set by
comparators are blanked during
cycling required to exit
external capacitor.
initial power-up.
sleep
Controls
Can be masked individually via
Fixed internal threshold
External input
Set via I2C
I2C.
(1)
For all supplies (except) for SM3 an output fault is detected if the output voltage is below 90% of the programmed regulation voltage. In
the SM3 converter an output fault indicates that the output OVP threshold was reached.
Figure 26. Required External Components, Recommended Values, External Connections
Copyright 2006–2008, Texas Instruments Incorporated
31
Product Folder Link(s): TPS65820
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