
0
-10
-20
-30
-40
-50
-60
-70
Magnitude-dB
0
0.2
0.4
0.6
0.8
1
1.2
1.4
FrequencyNormalizedw.r.t.FS
DACChannelResponseforInterpolationFilterC
(Redlinecorrespondsto-43dB)
5.6.2
DAC Digital-Volume Control
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
5.6.1.4.3 Interpolation Filter C
Filter C is specifically designed for the 192-ksps mode. The pass band extends up to 0.4
× f
S (corresponds
to 80 kHz), more than sufficient for audio applications.
Figure 5-32. Frequency Response of DAC Interpolation Filter C
Table 5-30. Specification for DAC Interpolation Filter C
Parameter
Condition
Value (Typical)
Unit
Filter-gain pass band
0
… 0.35 f
S
±0.03
dB
Filter-gain stop band
0.6 fS … 1.4 fS
–43
dB
Filter group delay
13/fS
s
The DAC has a digital-volume control block which implements programmable gain. Each channel has an
independent volume control that can be varied from 24 dB to –63.5 dB in 0.5-dB steps. The left-channel
DAC volume can be controlled by writing to page 0/register 65, bits D7–D0. The right-channel DAC
volume can be controlled by writing to page 0/register 66, bits D7–D0. DAC muting and setting up a
master gain control to control both channels is done by writing to page 0/register 64, bits D3–D0. The gain
is implemented with a soft-stepping algorithm, which only changes the actual volume by 0.125 dB per
input sample, either up or down, until the desired volume is reached. The rate of soft-stepping can be
slowed to one step per two input samples by writing to page 0/register 63, bits D1–D0. Note that the
default source for volume-control level settings is control by register writes (page 0/registers 65 and 66 to
control volume). Use of the VOL/MICDET pin to control the DAC volume is ignored until the volume
control source selected has been changed to pin control (page 0/register 116, bit D7 = 1). This
During soft-stepping, the host does not receive a signal when the DAC has been completely muted. This
may be important if the host must mute the DAC before making a significant change, such as changing
sample rates. In order to help with this situation, the device provides a flag back to the host via a
read-only register, page 0/register 38, bit D4 for the left channel and bit D0 for the right channel. This
information alerts the host when the part has completed the soft-stepping, and the actual volume has
reached the desired volume level. The soft-stepping feature can be disabled by writing to
page 0/register 63, bits D1–D0.
APPLICATION INFORMATION
52