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參數資料
| 型號： | TSC2117IRGZR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, VQFN-48 |
| 文件頁數： | 155/192頁 |
| 文件大?。?/td> | 2728K |
| 代理商： | TSC2117IRGZR |
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5.6.10 Analog Outputs
5.6.10.1 Headphone Drivers
5.6.10.2 Speaker Drivers
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
www.ti.com
SLAS550A – APRIL 2009 – REVISED JUNE 2009
Various analog routings are supported for playback. All the options can be conveniently viewed on the
functional block diagram, Figure 1-1.
The TSC2117 features a stereo headphone driver (HPL and HPR) that can deliver up to 30 mW per
channel, at 3.3 V supply voltage, into a 16-
load. The headphones are used in a single-ended
configuration where an ac coupling capacitor (dc blocking) is connected between the device output pins
and the headphones. The headphone driver also supports 32-
and 10-k loads without changing any
control register settings.
The headphone drivers can be configured to optimize the power consumption in the lineout-drive mode by
writing 11 to page 0/register 44, bits D2–D1.
The output common mode of the headphone/lineout drivers can be programmed to 1.35 V, 1.5 V, 1.65 V,
or 1.8 V by setting page 1/register 31, bits D4–D3. The common-mode voltage should be set
≤ AVDD/2.
The left headphone driver can be powered on by writing to page 1/register 31, bit D7. The right
headphone driver can be powered on by writing to page 1/register 31, bit D6. The left-output driver gain
can be controlled by writing to page 1/register 40, bits D6–D3, and it can be muted by writing to
page 1/register 40, bit D2. The right-output driver gain can be controlled by writing to page 1/register 41,
bits D6–D3, and it can be muted by writing to page 1/register 41, bit D2.
The TSC2117 has a short-circuit protection feature for the headphone drivers, which is always enabled to
provide protection. The output condition of the headphone driver during short circuit can be programmed
by writing to page 1/register 31, bit D1. If D1 = 0 when a short circuit is detected, the device limits the
maximum current to the load. If D1 = 1 when a short circuit is detected, the device powers down the
output driver. The default condition for headphones is the current-limiting mode. In case of a short circuit
on either channel, the output is disabled and a status flag is provided as read-only bits on
page 1/register 31, bit D0. If shutdown mode is enabled, then as soon as the short circuit is detected,
page 1/register 31, bit D7 (for HPL) and/or page 1/register 31, bit D6 (for HPR) clears automatically. Next,
the device requires a reset to re-enable the output stage. Resetting can be done in two ways. First, the
device master reset can be used, which requires either toggling the RESET pin or using the software
reset. If master reset is used, it resets all of the registers. Second, a dedicated headphone power-stage
reset can also be used to re-enable the output stage, and that keeps all of the other device settings. The
headphone power stage reset is done by setting page 1/register 31, bit D7 for HPL and by setting page
1/register 31, bit D6 for HPR. If the fault condition has been removed, then the device returns to normal
operation. If the fault is still present, then another shutdown occurs. Repeated resetting (more than three
times) is not recommended, as this could lead to overheating.
The TSC2117 has an integrated class-D stereo speaker driver (SPLP/SPLN and SPRP/SPRN) capable of
driving an 8-
differential load. The speaker driver can be powered directly from the battery supply (2.7 V
to 5.5 V) on the SLVDD and SRVDD pins; however, the voltage (including spike voltage) must be limited
below the absolute-maximum voltage of 6 V.
The speaker driver is capable of supplying 400 mW per channel with a 3.6-V power supply. Through the
use of digital mixing, the device can connect one or both digital audio playback data channels to either
speaker driver; this also allows digital channel swapping if needed.
The left class-D speaker driver can be powered on by writing to page 1/register 32, bit D7. The right
class-D speaker driver can be powered on by writing to page 1/register 32, bit D6. The left-output driver
gain can be controlled by writing to page 1/register 42, bits D4–D3, and it can be muted by writing to page
1/register 42, bit D2. The right-output driver gain can be controlled by writing to page 1/register 43, bits
D4–D3, and it can be muted by writing to page 1/register 43, bit D2.
APPLICATION INFORMATION
65
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