
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
Page 0/Register 72: Right Beep Generator(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D6
R/W
00
00: Left and right channels have independent beep volume control.
01: Left-channel beep volume control is the programmed value of right-channel beep volume control.
10: Right-channel beep volume control is the programmed value of left-channel beep volume control.
11: Same as 00
D5–D0
R/W
00 0000
00 0000: Right-channel beep volume control = 2 dB
00 0001: Right-channel beep volume control = 1 dB
00 0010: Right-channel beep volume control = 0 dB
00 0011: Right-channel beep volume control = –1 dB
...
11 1110: Right-channel beep volume control = –60 dB
11 1111: Right-channel beep volume control = –61 dB
(1)
The beep generator is only available in PRB_P25 DAC processing mode.
Page 0/Register 73: Beep Length MSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
8 MSBs out of 24 bits for the number of samples for which the beep must be generated.
Page 0/Register 74: Beep Length Middle Bits
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0000 0000
8 middle bits out of 24 bits for the number of samples for which the beep must be generated.
Page 0/Register 75: Beep Length LSB
=
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1110 1110
8 LSBs out of 24 bits for the number of samples for which beep need to be generated.
Page 0/Register 76: Beep Sin(x) MSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0001 0000
8 MSBs out of 16 bits for sin(2
π × f
in/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0/Register 77: Beep Sin(x) LSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1101 1000
8 LSBs out of 16 bits for sin(2
π × f
in/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0/Register 78: Beep Cos(x) MSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0111 1110
8 MSBs out of 16 bits for cos(2
π × f
in/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0/Register 79: Beep Cos(x) LSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1110 0011
8 LSBs out of 16 bits for cos(2
π × f
in/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0/Register 80: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Write only the reset value to these bits.
124
REGISTER MAP