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參數資料
| 型號： | 70V659S15DR |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 128K X 36 DUAL-PORT SRAM, 15 ns, PQFP208 |
| 封裝： | 28 X 28 MM, 3.50 MM HEIGHT, PLASTIC, QFP-208 |
| 文件頁數： | 14/24頁 |
| 文件大?。?/td> | 316K |
| 代理商： | 70V659S15DR |
21
IDT70V659/58/57S
High-Speed 3.3V 128/64/32K x 36 Asynchronous Dual-Port Static RAM
Industrial and Commercial Temperature Ranges
ThesemaphoreflagsareactiveLOW.Atokenisrequestedbywriting
azerointoasemaphorelatchandisreleasedwhenthesamesidewrites
aonetothatlatch.
The eight semaphore flags reside within the IDT70V659/58/57 in a
separatememoryspacefromtheDual-PortRAM.Thisaddressspaceis
accessedbyplacingalowinputontheSEMpin(whichactsasachipselect
forthesemaphoreflags)andusingtheothercontrolpins(Address, CE,
R/WandBEo)astheywouldbeusedinaccessingastandardStaticRAM.
Eachoftheflagshasauniqueaddresswhichcanbeaccessedbyeither
sidethroughaddresspinsA0–A2.Whenaccessingthesemaphores,none
of the other address pins has any effect.
When writing to a semaphore, only data pin D0 is used. If a low level
iswrittenintoanunusedsemaphorelocation,thatflagwillbesettoazero
on that side and a one on the other side (see Truth Table V). That
semaphorecannowonlybemodifiedbythesideshowingthezero.When
aoneiswrittenintothesamelocationfromthesameside,the flagwillbe
settoaoneforbothsides(unlessasemaphorerequestfromtheotherside
ispending)andthencanbewrittentobybothsides.Thefactthattheside
whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites
fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor
communications.(Athoroughdiscussionontheuseofthisfeaturefollows
shortly.) A zero written into the same location from the other side will be
storedinthesemaphorerequestlatchforthatsideuntilthesemaphoreis
freed by the first side.
Whenasemaphoreflagisread,itsvalueisspreadintoalldatabitsso
thataflagthatisaonereadsasaoneinalldatabitsandaflagcontaining
azeroreadsasallzeros.Thereadvalueislatchedintooneside’soutput
registerwhenthatside'ssemaphoreselect(SEM,BEn)andoutputenable
(OE) signals go active. This serves to disallow the semaphore from
changing state in the middle of a read cycle due to a write cycle from the
otherside.Becauseofthislatch,arepeatedreadofasemaphoreinatest
loopmustcauseeithersignal(SEMorOE)togoinactiveortheoutputwill
never change. However, during reads BEn functions only as an output
forsemaphore.Itdoesnothaveanyinfluenceonthesemaphore control
logic.
AsequenceWRITE/READmustbeusedbythesemaphoreinorder
to guarantee that no system level contention will occur. A processor
requestsaccesstosharedresourcesbyattemptingtowriteazerointoa
semaphorelocation.Ifthesemaphoreisalreadyinuse,thesemaphore
reasonforthisiseasilyunderstoodbylookingatthesimplelogicdiagram
ofthesemaphoreflaginFigure4.Twosemaphorerequestlatchesfeed
into a semaphore flag. Whichever latch is first to present a zero to the
semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother
side HIGH. This condition will continue until a one is written to the same
semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch
havebeenwrittentoazerointhemeantime,thesemaphoreflagwillflip
overtotheothersideassoonasaoneiswrittenintothefirstside’srequest
latch.Thesecondside’sflagwillnowstayLOWuntilitssemaphorerequest
latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore
is requested and the processor which requested it no longer needs the
resource, the entire system can hang up until a one is written into that
The critical case of semaphore timing is when both sides request a
single token by attempting to write a zero into it at the same time. The
semaphorelogicisspeciallydesignedtoresolvethisproblem.Ifsimulta-
neousrequestsaremade,thelogicguaranteesthatonlyonesidereceives
thetoken.Ifonesideisearlierthantheotherinmakingtherequest,thefirst
sidetomaketherequestwillreceivethetoken.Ifbothrequestsarriveat
the same time, the assignment will be arbitrarily made to one port or the
other.
One caution that should be noted when using semaphores is that
semaphoresalonedonotguaranteethataccesstoaresourceissecure.
Aswithanypowerfulprogrammingtechnique,ifsemaphoresaremisused
or misinterpreted, a software error can easily happen.
Initializationofthesemaphoresisnotautomaticandmustbehandled
viatheinitializationprogramatpower-up.Sinceanysemaphorerequest
flagwhichcontainsazeromustberesettoaone,allsemaphoresonboth
sidesshouldhaveaonewrittenintothematinitializationfrombothsides
to assure that they will be free when needed.
How the Semaphore Flags Work
Thesemaphorelogicisasetofeightlatcheswhichareindependent
oftheDual-PortRAM.Theselatchescanbeusedtopassaflag,ortoken,
from one port to the other to indicate that a shared resource
isinuse.Thesemaphoresprovideahardwareassistforauseassignment
methodcalled“TokenPassingAllocation.”Inthismethod,thestateofa
semaphore latch is used as a token indicating that a shared resource is
inuse.Iftheleftprocessorwantstousethisresource,itrequeststhetoken
bysettingthelatch.Thisprocessorthenverifiesitssuccessinsettingthe
latchbyreadingit. Ifitwassuccessful,itproceedstoassumecontrolover
thesharedresource.Ifitwasnotsuccessfulinsettingthelatch,itdetermines
thattherightsideprocessorhassetthelatchfirst, hasthetokenandisusing
thesharedresource.Theleftprocessorcantheneitherrepeatedlyrequest
that semaphore’s status or remove its request for that semaphore to
performanothertaskandoccasionallyattemptagaintogaincontrolofthe
tokenviathesetandtestsequence.Oncetherightsidehasrelinquished
thetoken,theleftsideshouldsucceedingainingcontrol.
Figure 4. IDT70V659/58/57 Semaphore Logic
D
4869 drw 19
0
D
Q
WRITE
D0
D
Q
WRITE
SEMAPHORE
REQUEST FLIP FLOP
SEMAPHORE
REQUEST FLIP FLOP
LPORT
RPORT
SEMAPHORE
READ
SEMAPHORE
READ
requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,
afactwhichtheprocessorwillverifybythesubsequentread(seeTable
V). As an example, assume a processor writes a zero to the left port at a
freesemaphorelocation.On usedinstead,systemcontentionproblems
could have occurred during the gap between the read and write cycles.
Itisimportanttonotethatafailedsemaphorerequestmustbefollowed
by either repeated reads or by writing a one into the same location. The
semaphorerequestlatch.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 70V659S15DRI | 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 3.3V 4.5MBIT 128KX36 15NS 208PQFP - Bulk |
| 70V7319S133BC | 功能描述:IC SRAM 4.5MBIT 133MHZ 256CABGA 制造商:idt, integrated device technology inc 系列:- 包裝:托盤 零件狀態:有效 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，同步 存儲容量:4.5M（256K x 18） 速度:133MHz 接口:并聯 電壓 - 電源:3.15 V ~ 3.45 V 工作溫度:0°C ~ 70°C（TA） 封裝/外殼:256-LBGA 供應商器件封裝:256-CABGA（17x17） 標準包裝:6 |
| 70V7319S133BC8 | 功能描述:IC SRAM 4.5MBIT 133MHZ 256CABGA 制造商:idt, integrated device technology inc 系列:- 包裝:帶卷（TR） 零件狀態:有效 格式 - 存儲器:RAM 存儲器類型:SRAM - 雙端口，同步 存儲容量:4.5M（256K x 18） 速度:133MHz 接口:并聯 電壓 - 電源:3.15 V ~ 3.45 V 工作溫度:0°C ~ 70°C（TA） 封裝/外殼:256-LBGA 供應商器件封裝:256-CABGA（17x17） 標準包裝:1,000 |
| 70V7319S133BF | 功能描述:靜態隨機存取存儲器 RoHS:否 制造商:IDT 存儲容量: 組織: 訪問時間: 電源電壓-最大: 電源電壓-最小: 最大工作電流: 最大工作溫度: 最小工作溫度: 安裝風格: 封裝 / 箱體: 封裝: |
| 70V7319S133BF8 | 制造商:Integrated Device Technology Inc 功能描述:SRAM SYNC DUAL 3.3V 4.5MBIT 256KX18 15NS/4.2NS 208FBGA - Tape and Reel |
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