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參數資料
| 型號： | 935262451518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP100 |
| 封裝： | 14 X 14 X 1.40 MM, PLASTIC, SOT-407, LQFP-100 |
| 文件頁數： | 104/144頁 |
| 文件大小： | 592K |
| 代理商： | 935262451518 |
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2000 Mar 15
62
Philips Semiconductors
Preliminary specication
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb lter, VBI-data slicer and high performance scaler
SAA7114H
9.4
Video expansion port (X-port)
The expansion port is intended for transporting video
streams image data from other digital video circuits like
MPEG encoder/decoder and video phone codec, to the
image port (I-port).
The expansion port consists of two groups of signals/pins:
8-bit data, I/O, regularly components video
YUV4:2:2, i.e. CB-Y-CR-Y, byte serial, exceptionally
raw video samples (e.g. ADC test). In input mode the
data bus can be extended to 16-bit by the pins
HPD7 to HPD0.
Clock, synchronization and auxiliary signals,
accompanying the data stream, I/O.
As output, these are direct copies of the decoder signals.
The data transfers through the expansion port represent a
single D1 port, with half duplex mode. The SAV and EAV
codes may be inserted optionally for data input (controlled
by bit XCODE[92H[3]]). The input/output direction is
switched for complete fields, only.
Table 26 Signals dedicated to the expansion port
SYMBOL
PIN
I/O
DESCRIPTION
BIT
XPD7 to
XPD0
81, 82,
84 to 87,
89 and 90
I/O X-port data: in output mode controlled by decoder
section, data format see Table 27; in input mode
YUV4:2:2 serial input data or luminance part of
a 16-bit YUV 4 : 2 : 2 input
OFTS[2:0]13H[2:0];
91H[7:0] and C1H[7:0]
XCLK
94
I/O clock at expansion port: if output, then copy of LLC;
as input normally a double pixel clock of up to
32 MHz or a gated clock (clock gated with a
qualier)
XCKS[92H[0]]
XDQ
95
I/O data valid ag of the expansion port input (qualier):
if output, then decoder (HREF and VGATE) gate
(see Fig.23)
XRDY
96
O
data request ag = ready to receive, to work with
optional buffer in external device, to prevent internal
buffer overow;
second function: input related task ag A/B
XRQT[83H[2]]
XRH
92
I/O horizontal reference signal for the X-port: as output:
HREF or HS from the decoder (see Fig.23); as
input: a reference edge for horizontal input timing
and a polarity for input eld ID detection can be
dened
XRHS[13H[6]], XFDH[92H[6]] and
XDH[92H[2]]
XRV
91
I/O vertical reference signal for the X-port: as output:
V123 or eld ID from the decoder,
see Figs 21 and 22; as input: a reference edge for
vertical input timing and for input eld ID detection
can be dened
XRVS[1:0]13H[5:4], XFDV[92H[7]]
and XDV[1:0]92H[5:4]
XTRI
80
I
port control: switches X-port input 3-state
XPE[1:0]83H[1:0]
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