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參數資料
型號: 935262451518
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉換
英文描述: COLOR SIGNAL DECODER, PQFP100
封裝: 14 X 14 X 1.40 MM, PLASTIC, SOT-407, LQFP-100
文件頁數: 46/144頁
文件大?。?/td> 592K
代理商: 935262451518
2000 Mar 15
14
Philips Semiconductors
Preliminary specication
PAL/NTSC/SECAM video decoder with adaptive PAL/NTSC
comb lter, VBI-data slicer and high performance scaler
SAA7114H
8.1.2.1
Clamping
The clamp control circuit controls the correct clamping of
the analog input signals. The coupling capacitor is also
used to store and filter the clamping voltage. An internal
digital clamp comparator generates the information with
respect to clamp-up or clamp-down. The clamping levels
for the two ADC channels are fixed for luminance (60) and
chrominance (128). Clamping time in normal use is set
with the HCL pulse at the back porch of the video signal.
8.1.2.2
Gain control
The gain control circuit receives (via the I2C-bus) the static
gain levels for the two analog amplifiers or controls one of
these amplifiers automatically via a built-in Automatic Gain
Control (AGC) as part of the Analog Input Control (AICO).
The AGC (automatic gain control for luminance) is used to
amplify a CVBS or Y signal to the required signal
amplitude, matched to the ADCs input voltage range.
The AGC active time is the sync bottom of the video signal.
Signal (white) peak control limits the gain at signal
overshoots. The flow charts (see Figs 7 and 8) show more
details of the AGC. The influence of supply voltage
variation within the specified range is automatically
eliminated by clamp and automatic gain control.
Fig.4
Analog line with clamp (HCL) and gain
range (HSY).
handbook, halfpage
HCL
MGL065
HSY
analog line blanking
TV line
1
60
255
GAIN
CLAMP
Fig.5 Automatic gain range.
handbook, halfpage
analog input level
controlled
ADC input level
maximum
minimum
range 9 dB
0 dB
MHB325
+3 dB
6 dB
(1 V (p-p) 18/56
)
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