
TM1100 Preliminary Data Book
Philips Semiconductors
13-14
PRELIMINARY INFORMATION
File: icp.fm5, modified 7/26/99
2.0, etc. The LSBs of the U Counter (i.e. the fractional
part less than 1) are passed along to the filter to generate
the intermediate values. An LSB value of 0.5 means that
the output line is half way between Yn and Yn+1. The filter
contains a set of 5 filter parameter RAMs, one for each
coefficient. The 5 most significant LSBs from the counter
select the filter coefficients which will generate the cor-
rect value for the output pixel at the relative offset from
0.0 indicated by the LSBs.
For down scaling, the increment factor will be greater
than one. If the increment factor is 2.0, two new blocks
will have to be loaded before starting the next vertical fil-
ter pass. If the increment factor is 5 or greater, all five
blocks will have to be loaded. The number of blocks to be
loaded for the next line is equal to the integer increment
value plus carry out from the LSB portion of the U
Counter increment.
Note that the LSB adder carry out is available before the
U Counter has been updated. This allows you to use the
current U Counter value LSB bits for the filter coefficients
while using the carry out for the next value to predict how
many blocks to fetch. The integer value from the U incre-
ment value plus the carry in from the LSB portion of the
Increment adder is the number of blocks to be loaded.
These blocks must be sequentially loaded (and not
skipped) so that the filter has the necessary 5 adjacent
lines to perform the filtering. The contents of the integer
portion of the U Counter (updated after the add) are not
used.
You can only load one new block while the current line is
being processed. If two or more blocks are needed to
process the next line, you load one in overlap, wait until
the current line is done and then load the rest of the
blocks. The microprogram only has to make two deci-
sions for the next line: is the increment value zero or
greater than zero, and if greater than zero, is it greater
than five. If it is zero, do nothing: you will reuse all five
blocks. If it is 1-4, load the next block. If it is five or more,
calculate the address of the first block -- by adding N
times the address offset to the Y counter -- and fetch it.
When a new block is loaded and it is time to process the
next line, the block which was Yn+2 becomes Yn+1. The
Y blocks, in effect, shift up one line as you scan down the
image. This shifting action is implemented by shifting the
block select codes in the Filter Source Select Register
(FSSR). The FSSR contains six 3-bit register fields.
These 3-bit fields are rotated by a shift command to the
FSSR. The output of five of the FSSR fields go to the in-
put multiplexer, which selects the next block combination
and sends it to the filter. The output of the sixth field is the
free block to be filled for the next line while the current
line is being processed. The select code is also the block
SDRAM
T
o
SDRAM
Output
Buffers
6,7
Block
FIFO
Y Counter
Yn+2 Buffer
5-tap Filter
a
+2
RAM
a
+1
RAM
a
+0
RAM
a
-1
RAM
a
-2
RAM
Yn+1 Buffer
Yn+0 Buffer
Yn-1 Buffer
Yn-2 Buffer
U Incr Integer
U LSBs
U LSB Reg
U Incr Fraction
Z Counter
Filter Source Select
6 In x 5 Out
Multiplexer
FSSR
Y
Line
clock
Line Clock
Carry
Byte Index
Pixel Clock
Block Count
to Microcode
U MSB Cntr
Block Address
to SDRAM
Output
Pixel clock
Figure 13-14. ICP Vertical Scaling Data Flow Block Diagram