
TM1100 Preliminary Data Book
Philips Semiconductors
A-152
PRELIMINARY INFORMATION
File: ops.fm5, modified 7/23/99
Read data cache status bits
SYNTAX
[ IF r
guard ] rdstatus(d) rsrc1
→ rdest
FUNCTION
if r
guard then {
set_addr
← rsrc1 + d
/* set_addr<10:6> selects set */
r
dest<9:0>
← dcache_LRU_set(set_addr)
r
dest<17:10>
← dcache_dirty_set(set_addr)
r
dest<31:17>
← 0
}
ATTRIBUTES
Function unit
dmemspec
Operation code
203
Number of operands
1
Modier
7 bits
Modier range
–256..252 by 4
Latency
3
Issue slots
5
DESCRIPTION
The rdstatus operation reads the LRU and dirty bits associated with a set in the data cache and writes these bits
into the destination register r
dest. The target set in the data cache is determined by bits 10..6 of the result of rsrc1 + d.
The
d value is an opcode modier, must be in the range –256 to 252 inclusive, and must be a multiple of 4.
The result of rdstatus contains LRU information in bits 9..0 and dirty-bit information in bits 17..10. All other bits of
r
dest are set to zero.
rdstatus
requires two stall cycles to complete.
The dual-ported data cache uses two separate copies of tag and status information. A rdstatus operation
returns the LRU and dirty information stored in the cache port that corresponds to the operation slot in which the
rdstatus
operation is issued.
The rdstatus operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB controls the
modication of the destination register. If the LSB of r
guard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
Initial Values
Operation
Result
rdstatus(0) r30
→ r60
r10 = 0
IF r10 rdstatus(4) r40
→ r70
no change, since guard is false
r20 = 1
IF r20 rdstatus(8) r50
→ r80
SEE ALSO
rdstatus