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| 型號： | AD7719BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Voltage, Low Power, Factory-Calibrated 16-/24-Bit Dual ADC |
| 中文描述： | 6-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | MS-153AE, TSSOP-28 |
| 文件頁數(shù)： | 38/40頁 |
| 文件大小： | 367K |
| 代理商： | AD7719BRU |
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REV. 0
AD7719
–38–
3-Wire RTD Configurations
To fully optimize a 3-wire RTD configuration, two identically
matched current sources are required. The AD7719, which
contains two well-matched current sources, is ideally suited to
these applications. One possible 3-wire configuration using the
AD7719 is outlined in Figure 23.
REFIN(
–
)
IOUT1
DGND
AGND
5V
12.5k
AV
DD
AIN2
AIN1
AD7719
RL3
R
CM
REFIN(+)
CONTROLLER
IOUT2
DV
DD
DRDY
SCLK
DIN
DOUT
CS
XTAL1
XTAL2
RL2
RTD
200 A
200 A
RL1
Figure 23. 3-Wire RTD Configuration Using the AD7719
In this 3-wire configuration, the lead resistances will result in
errors if only one current source is used as the 200
μ
A will flow
through RL1, developing a voltage error between AIN1 and
AIN2. In the scheme outlined below, the second RTD current
source is used to compensate for the error introduced by the
200
μ
A flowing through RL1. The second RTD current flows
through RL2. Assuming RL1 and RL2 are equal (the leads
would normally be of the same material and of equal length),
and IOUT1 and IOUT2 match, the error voltage across RL2
equals the error voltage across RL1 and no error voltage is
developed between AIN1 and AIN2. Twice the voltage is devel-
oped across RL3 but, since this is a common-mode voltage, it
will not introduce errors. R
CM
is included so the current flow-
ing through the combination of RL3 and R
CM
develops enough
voltage that the analog input voltage seen by the AD7719 is
within the common-mode range of the ADC. The reference
voltage for the AD7719 is also generated using one of these
matched current sources. This reference voltage is developed
across the 12.5 k
resistor as shown, and applied to the differen-
tial reference inputs of the AD7719. This scheme ensures that the
analog input voltage span remains ratiometric to the reference
voltage. Any errors in the analog input voltage due to the tem-
perature drift of the RTD current source is compensated for by
the variation in the reference voltage. The typical drift matching
between the two RTD current sources is less than 1 ppm/
°
C.
The voltage on either I
OUT
pin can go to within 0.6 V of the
AV
DD
supply.
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