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參數資料
| 型號： | AD7719BRU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Low Voltage, Low Power, Factory-Calibrated 16-/24-Bit Dual ADC |
| 中文描述： | 6-CH 24-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO28 |
| 封裝： | MS-153AE, TSSOP-28 |
| 文件頁數： | 9/40頁 |
| 文件大?。?/td> | 367K |
| 代理商： | AD7719BRU |
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REV. 0
AD7719
–9–
PIN CONFIGURATION
14
13
12
11
10
17
16
15
19
18
20
28
27
26
25
24
23
22
21
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
AD7719
IOUT1
DGND
DV
DD
XTAL2
XTAL1
IOUT2
AV
DD
AGND
RDY
DOUT
DIN
REFIN1(
–
)
REFIN1(+)
AIN1
AIN2
AIN3
AIN4
RESET
P1/SW1
SCLK
CS
AIN5
AIN6
REFIN2
P4
P3
P2/SW2
PWRGND
The serial interface can be reset by exercising the
RESET
input
on the part. It can also be reset by writing a series of 1s on the
DIN input. If a Logic 1 is written to the AD7719 DIN line for
at least 32 serial clock cycles the serial interface is reset. This
ensures that in 3-wire systems, if the interface gets lost either via
a software error or by some glitch in the system, it can be reset
back to a known state. This state returns the interface to where
the AD7719 is expecting a write operation to its Communica-
tions Register. This operation resets the contents of all registers to
their power-on reset values.
Some microprocessor or microcontroller serial interfaces have a
single serial data line. In this case, it is possible to connect the
AD7719
’
s DATA OUT and DATA IN lines together and connect
them to the single data line of the processor. A 10 k
pull-up
resistor should be used on this single data line. In this case, if
the interface gets lost, because the read and write operations
share the same line the procedure to reset it back to a known
state is somewhat different than previously described. It requires
a read operation of 24 serial clocks followed by a write operation
where a Logic 1 is written for at least 32 serial clock cycles to
ensure that the serial interface is back into a known state.
PIN FUNCTION DESCRIPTIONS
Pin No.
Mnemonic
Function
Output for Internal 200
μ
A Excitation Current Source. Either current source IEXC1 or IEXC2 or
both can be switched to this output.
Output for Internal 200
μ
A Excitation Current Source. Either IEXC1 or IEXC2 current source or
both can be switched to this output.
Analog Supply Voltage.
Analog Ground.
Negative Reference Input for Main ADC Channel. This reference input can lie anywhere between
AGND and AV
DD
–
1 V.
Positive Reference Input for Main ADC Channel. REFIN1(+) can lie anywhere between AV
DD
and
AGND + 1 V. The nominal reference voltage (REFIN1(+)
–
REFIN1(
–
)) is 2.5 V, but the part is
functional with a reference range from 1 V to AV
DD
.
Analog Input. AIN1 is dedicated to the main channel.
Analog Input. AIN2 is dedicated to the main channel.
Analog Input. AIN3 can be multiplexed to either the main or auxiliary channel
Analog Input. AIN4 can be multiplexed to either the main or auxiliary channel.
Analog Input. AIN5 is dedicated to the auxiliary channel and is referenced to AIN6 or AGND
Analog Input. AIN6 is dedicated to the auxiliary channel. It forms a differential input pair with AIN5
in fully differential input mode or is referenced to AGND in pseudo-differential mode.
Single-Ended Reference Input for Auxiliary Channel. The nominal input reference is 2.5 V. The
auxiliary channel will function with an input reference range from 1 V to AV
DD
.
General-Purpose I/O Bit. The input and output voltage levels are referenced to AV
DD
and AGND.
General-Purpose I/O Bit. The input and output voltage levels are referenced to AV
DD
and AGND.
1
IOUT1
2
IOUT2
3
4
5
AV
DD
AGND
REFIN1(
–
)
6
REFIN1(+)
7
8
9
10
11
12
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
13
REFIN2
14
15
P4
P3
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