欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: AD7725
廠商: Analog Devices, Inc.
英文描述: 16-Bit 900 kSPS ADC with a Programmable Postprocessor
中文描述: 16位900 ksps模數轉換器的可編程后處理器
文件頁數: 19/28頁
文件大?。?/td> 442K
代理商: AD7725
REV. A
AD7725
–19–
Figure 20 shows an example of a filtering function implemented
on the postprocessor. Figure 20a shows the data path representa-
tion of an FIR filter, while Figure 20b shows how this algorithm
would be implemented on the AD7725. Because the postprocessor
can implement three filter taps per MAC block, 1.3 MAC
blocks are required to implement a 4-tap FIR filter. This is a
useful guideline when calculating the design requirements for a
new application.
SIGNAL
IN
Z
–1
C
0
SIGNAL
OUT
C
1
C
2
C
3
Z
–1
Z
–1
Z
–1
a) FIR Data Path Representation
SIGNAL
IN
SIGNAL
OUT
C
1
C
2
C
3
Z
–1
Z
–1
C
0
Z
–1
Z
–1
Z
–1
1 MAC BLOCK
b) FIR Postprocessor Implementation
Figure 20. AD7725 Postprocessor Mapping
PROGRAMMING THE POSTPROCESSOR
The postprocessor is programmed by loading a user-defined
filter in the form of a configuration file into the device.
Generating a Configuration File to Load into the Postprocessor
A user-defined configuration file can be generated to load into
the postprocessor on the AD7725 to program the multipliers
and accumulators to perform user-specific filtering require-
ments. The configuration file can be generated using a digital
filter design package called Filter Wizard, which is available
from the Analog Devices website.
Filter Wizard
This digital filter design package allows the user to design differ-
ent filter types and then generates the appropriate configuration
file to be loaded into the postprocessor. This application includes
the ability to specify a range of different filter options including
single or multistage; normalized or user-specified output
frequency; FIR or IIR; low-pass, band-pass; Window type;
pass-band frequency and ripple; stop-band frequency, attenua-
tion and ripple; daisy-chaining and interlacing. It also informs
the user of the power dissipation of the AD7725 associated
with the particular filter designed. This is to avoid filters being
designed that result in the device exceeding its maximum power
specifications. The magnitude, phase, and impulse responses
can be plotted so that the user knows the filter response (cutoff
frequency, transition width, attenuation) before generating the
coefficients. Once the filter characteristics have been decided,
the configuration file is generated and will be ready for loading
into the postprocessor.
Filter Configuration File Format
The configuration file that is generated by the Filter Wizard is
made up of 8272 bits of data. The first word in the file is called
the ID word, and the device will accept the configuration file only
if this is 0x7725. The rest of the configuration data is split into 12
blocks of 672 bits. The AD7725 postprocessor therefore accepts
672 bits at a time (42, 16-bit words). Each block of 672 bits is
followed by a cyclic redundancy check (CRC) word. The ID
word and the CRC words are used by the device to check for
errors in the configuration file and are not actually written to the
postprocessor. The postprocessor therefore holds 8064 bits of
data (672 12). See the Serial Mode and Parallel Mode sections
for further information on how configuration errors are detected
and handled. The filter coefficients in the configuration file that
are loaded into the postprocessor have 24-bit precision and have
a value in the range –8
coefficient < +8. The coefficients are
made up of 1 sign bit, 3 magnitude bits left of the decimal point,
and 20 right of the decimal point.
Using the Internal Default Filter
The AD7725 has a default filter stored in internal ROM that
can be loaded into the postprocessor. This functionality allows
the user to evaluate the device without having to download a
configuration file.
The default filter is a two-stage, low-pass,
FIR
filter whose specifications are directly related to the CLKIN
frequency. With a CLKIN frequency of 9.6 MHz, the default
filter has a cutoff frequency of 49 kHz and a stop-band frequency
of 72.7 kHz. This filter has a total decimation by 4, which occurs
in the first stage, resulting in the output data being available to the
interface at a frequency of CLKIN/32. For more detailed specifica-
tions on this filter see the Preset Filter, Default Filter, and
Postprocessor Characteristics section. When powered up in
boot-from-ROM mode, the AD7725 will automatically load the
default filter characteristic into the postprocessor. Figure 21
shows the default filter response, when operating with a 9.6 MHz
CLKIN frequency.
FREQUENCY – kHz
0
0
150
A
50
100
–140
–120
–100
–80
–60
–40
–20
–160
Figure 21. Default Filter Response for CLKIN = 9.6 MHz
相關PDF資料
PDF描述
AD7725BS 16-Bit 900 kSPS ADC with a Programmable Postprocessor
AD7729 Dual Sigma-Delta ADC with Auxiliary DAC
AD7729AR Dual Sigma-Delta ADC with Auxiliary DAC
AD7729ARU Dual Sigma-Delta ADC with Auxiliary DAC
AD7730LBR Bridge Transducer ADC
相關代理商/技術參數
參數描述
AD7725BS 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 900ksps 16-bit Parallel/Serial 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:16-BIT PROGRAMMABLE SIGMA-DELTA ADC I.C. - Bulk 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7725 MQFP44
AD7725BSC-REEL 制造商:Analog Devices 功能描述:
AD7725BS-REEL 制造商:Analog Devices 功能描述:ADC Single Delta-Sigma 900ksps 16-bit Parallel/Serial 44-Pin MQFP T/R 制造商:Rochester Electronics LLC 功能描述:16-BIT PROGRAMMABLE SIGMA-DELTA ADC I.C. - Tape and Reel
AD7725BSZ 功能描述:IC ADC 16BIT PROG 44MQFP RoHS:是 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率(每秒):3M 數據接口:- 轉換器數目:- 功率耗散(最大):- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:-
AD7727BCPZRL 制造商:Analog Devices 功能描述:
主站蜘蛛池模板: 宜黄县| 郑州市| 岑巩县| 巴林右旗| 山西省| 漳平市| 临西县| 宜昌市| 蓬安县| 普定县| 读书| 嘉荫县| 平泉县| 潮安县| 南京市| 墨江| 四平市| 房山区| 遂平县| 上饶县| 滨州市| 济源市| 松溪县| 类乌齐县| 宜良县| 福安市| 平谷区| 抚州市| 西畴县| 石狮市| 昆山市| 白沙| 仪征市| 临朐县| 宁德市| 玉田县| 类乌齐县| 高州市| 汪清县| 永安市| 新野县|