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參數資料
型號: AD9992BBCZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: 12-Bit CCD Signal Processor with Precision Timing Generator
中文描述: SPECIALTY CONSUMER CIRCUIT, PBGA105
封裝: 8 X 8 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-225, CSPBGA-105
文件頁數: 87/92頁
文件大小: 718K
代理商: AD9992BBCZ
AD9992
Rev. 0 | Page 87 of 92
Address
0F
10
11
12
13
14
15
16
17
18
19
Data
Bits
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[20:13]
[21]
[22]
[23]
[25:24]
[12:0]
Default
Value
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Update
Type
SCP
SCP
SCP
SCP
SCP
SCP
SCP
SCP
SCP
SCP
SCP
Name
VSTARTC
VLENC
VREPC_ODD
VREPC_EVEN
VSTARTD
VLEND
VREPD_ODD
VREPD_EVEN
FREEZE1
RESUME1
FREEZE2
RESUME2
FREEZE3
RESUME3
FREEZE4
RESUME4
HBLKSTART
HBLKEND
HBLKLEN
HBLKREP
HBLKMASK_H1
HBLKMASK_H2
HBLKMASK_HL
TEST
HBLKTOGO1
Description
Start position of selected V-Pattern Group C.
Length of selected V-Pattern Group C.
Number of repetitions for V-Pattern Group C for odd lines.
Number of repetitions for V-Pattern Group C for even lines.
Start position of selected V-Pattern Group D.
Length of selected V-Pattern Group D.
Number of repetitions for V-Pattern Group D for odd lines.
Number of repetitions for V-Pattern Group D for even lines.
Holds the V-outputs at their current levels.
Resumes the operation of V-outputs to finish the pattern.
Holds the V-outputs at their current levels.
Resumes the operation of V-outputs to finish the pattern.
Holds the V-outputs at their current levels.
Resumes the operation of V-outputs to finish the pattern.
Holds the V-outputs at their current levels.
Resumes the operation of V-outputs to finish the pattern.
Start location for HBLK in HBLK Modes 1 and 2.
End location for HBLK in HBLK Modes 1 and 2.
HBLK length in HBLK Modes 1 and 2.
Number of HBLK repetitions in HBLK Modes 1 and 2.
Masking polarity for H1/H3/H5/H7 during HBLK.
Masking polarity for H2/H4/H6/H8 during HBLK.
Masking polarity for HL during HBLK.
Test use only. Set to 0.
First HBLK toggle position for odd lines, or RA0H1REPABC in HBLK Mode 2
(see HBLK Mode 2 Operation for more information).
Second HBLK toggle position for odd lines, or RA1H1REPABC.
Third HBLK toggle position for odd lines, or RA2H1REPABC.
Fourth HBLK toggle position for odd lines, or RA3H1REPABC.
Fifth HBLK toggle position for odd lines, or RA4H1REPABC.
Sixth HBLK toggle position for odd lines, or RA5H1REPABC.
First HBLK toggle position for even lines, or RA0H2REPABC.
Second HBLK toggle position for even lines, or RA1H2REPABC.
Third HBLK toggle position for even lines, or RA2H2REPABC.
Fourth HBLK toggle position for even lines, or RA3H2REPABC.
Fifth HBLK toggle position for even lines, or RA4H2REPABC.
Sixth HBLK toggle position for even lines, or RA5H2REPABC.
HBLK Repeat Area Start Position A for HBLK Mode 2. Set to 8191 if not
used.
HBLK Repeat Area Start Position B for HBLK Mode 2. Set to 8191 if not
used.
HBLK Repeat Area Start Position C for HBLK Mode 2. Set to 8191 if not
used.
Special V-sequence alternation enable.
1= enables operation of VALTSEL0_EVEN/ODD, VALTSEL1_EVEN/ODD
registers in FREEZE/RESUME registers. Must be enabled if special VALT
mode is used.
1 = enables use of special vertical pattern insertion into VPATA sequence.
[0]: use VPATB as the special pattern.
[1]: use VPATC as the special pattern.
[2]: use VPATD as the special pattern.
1A
1B
1C
1D
1E
1F
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
[25:13]
[12:0]
X
X
X
X
X
X
X
X
X
X
X
X
SCP
SCP
SCP
SCP
SCP
SCP
HBLKTOGO2
HBLKTOGO3
HBLKTOGO4
HBLKTOGO5
HBLKTOGO6
HBLKTOGE1
HBLKTOGE2
HBLKTOGE3
HBLKTOGE4
HBLKTOGE5
HBLKTOGE6
HBLKSTARTA
[25:13]
X
HBLKSTARTB
20
[12:0]
X
SCP
HBLKSTARTC
[13]
[14]
X
X
VSEQALT_EN
VALT_MAP
[17:15]
X
SPC_PAT_EN
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