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參數資料
型號: ADAU1702JSTZ-RL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: SigmaDSP 28-56-Bit Audio Processor with Two ADCs and Four DACs
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: ROHS COMPLIANT, PLASTIC, MS-026BBC, LQFP-48
文件頁數: 44/52頁
文件大小: 773K
代理商: ADAU1702JSTZ-RL
ADAU1702
MULTIPURPOSE PINS
The ADAU1702 has 12 multipurpose (MP) pins that can be
individually programmed to be used as serial data inputs, serial
data outputs, digital control inputs/outputs to and from the
SigmaDSP core, or inputs to the 4-channel auxiliary ADC. These
pins allow the ADAU1702 to be used with external ADCs and
DACs. They also use analog or digital inputs to control settings
such as volume control, or use output digital signals to drive
LED indicators.
AUXILIARY ADC
The ADAU1702 has a 4-channel, auxiliary, 8-bit ADC that can
be used in conjunction with a potentiometer to control volume,
tone, or other parameter settings in the DSP program. Each of
the four channels is sampled at the audio sampling frequency (f
S
).
Full-scale input on this ADC is 3.3 V, so the step size is approxi-
mately 13 mV (3.3 V/256 steps). The input resistance of the ADC is
approximately 20 kΩ. Table 63 indicates which four MP pins are
mapped to the four channels of the auxiliary ADC. The auxiliary
ADC is enabled for those pins by writing 1111 to the appropriate
portion of the multipurpose pin configuration registers.
The auxiliary ADC is turned on by setting the AAEN bit of the
auxiliary ADC enable register (see Table 58).
Noise on the ADC input can cause the digital output to constantly
change by a few LSBs. If the auxiliary ADC is used to control
volume, this constant change causes small gain fluctuations.
To avoid this, add a low-pass filter or hysteresis to the auxiliary
ADC signal path by enabling either function in the auxiliary
ADC and power control register (2082), as described in Table 56.
The filter is enabled by default when the auxiliary ADC is
enabled. When data is read from the auxiliary ADC registers,
two bytes (12 bits of data, plus zero-padded LSBs) are available
because of this filtering.
Rev. 0 | Page 44 of 52
20k
10k
S1
S2
1.8pF
AUX ADC
INPUT PIN
0
Figure 30. Auxiliary ADC Input Circuit
Figure 30 shows the input circuit for the auxiliary ADC. Switch S1
enables the auxiliary ADC and is set by Bit 15 of the auxiliary
ADC enable register. The sampling switch, S2, operates at the
audio sampling frequency (f
S
).
The auxiliary ADC data registers can be written to directly after
AACW in the DSP core control register has been set. In this
mode, the voltages on the analog inputs are not written into the
registers, but rather the data in the registers is written from the
control port.
PVDD supplies the 3.3 V power for the auxiliary ADC analog
input. The digital core of the auxiliary ADC is powered with the
1.8 V DVDD signal.
Table 63. Multipurpose Pin Auxiliary ADC Mapping
Multipurpose Pin
MP0
MP1
MP2
MP3
MP4
MP5
MP6
MP7
MP8
MP9
MP10
MP11
GENERAL-PURPOSE INPUT/OUTPUT PINS
The general-purpose input/output (GPIO) pins can be used as
either inputs or outputs. These pins are readable and can be set
either through the control interface or directly by the SigmaDSP
core. When set as inputs, these pins can be used with push-button
switches or rotary encoders to control DSP program settings.
Digital outputs can be used to drive LEDs or external logic to
indicate the status of internal signals and control other devices.
Examples of this use include indicating signal overload, signal
present, and button press confirmation.
When set as an output, each pin can typically drive 2 mA. This
is enough current to directly drive some high efficiency LEDs.
Standard LEDs require about 20 mA of current and can be
driven from a GPIO output with an external transistor or buffer.
Because of issues that could arise from simultaneously driving
or sinking a large current on many pins, care should be taken in
the application design to avoid connecting high efficiency LEDs
directly to many or all of the MPx pins. If many LEDs are required,
use an external driver.
When the GPIO pins are set as open-collector outputs, they
should be pulled up to a maximum voltage of 3.3 V (the voltage
on IOVDD).
SERIAL DATA INPUT/OUTPUT PORTS
The flexible serial data input and output ports of the ADAU1702
can be set to accept or transmit data in 2-channel format or in an
8-channel TDM stream. Data is processed in twos complement,
MSB-first format. The left-channel data field always precedes
the right-channel data field in the 2-channel streams. In TDM
mode, Slot 0 to Slot 3 are in the first half of the audio frame, and
Slot 4 to Slot 7 are in the second half of the frame. TDM mode
allows fewer multipurpose pins to be used, freeing more pins
for other functions. The serial modes are set in the serial output
and serial input control registers.
The serial data clocks need to be synchronous with the ADAU1702
master clock input.
Function
N/A
N/A
ADC1
ADC2
N/A
N/A
N/A
N/A
ADC3
ADC0
N/A
N/A
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