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參數資料
| 型號： | ADM1060ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | CON-HDR64POS2ROW 4WALL.1X.1SP,RTANG,LOPF |
| 中文描述： | 7-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO28 |
| 封裝： | MO-153AE, TSSOP-28 |
| 文件頁數： | 32/45頁 |
| 文件大小： | 303K |
| 代理商： | ADM1060ARU |
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ADM1060
ADM1060 STATUS/FAULTS
–
32
–
REV. PrJ 11/02
PRELIMINARY TECHNICAL DATA
STATUS REGISTERS
T ABL E 40. L IST OF ST AT US RE GIST E RS
Hex
T able
Name
Addr.
D efault
Power On Value
Description
D 8
41
U V ST A T
00h
Logic output of the UV comparator on each of the 7 SFD
’
s
D 9
42
OV ST A T
00h
Logic output of the OV comparator on each of the 7 SFD
’
s
D A
43
SF D ST A T
00h
Logic output (post Fault T ype block) on each of the 7 SFD
’
s
D B
44
G W ST A T
00h
Logic state of the 4 GPI
’
s and the Watchdog Fault Detector
D E
45
PD OST AT 1
00h
Logic output of PDO
’
s 1 to 8
D F
46
PD OST AT 2
00h
Logic output of PDO 9
T ABL E 41. BIT MAP F OR UVST AT RE GIST E R D8H (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7
Reserved
N/A
Cannot be used
6
V P4U V
R
If high, then voltage on VP4 input is lower than the UV threshold
5
V P3U V
R
If high, then voltage on VP3 input is lower than the UV threshold
4
V P2U V
R
If high, then voltage on VP2 input is lower than the UV threshold
3
V P1U V
R
If high, then voltage on VP1 input is lower than the UV threshold
2
V H U V
R
If high, then voltage on VH input is lower than the UV threshold
1
V B2U V
R
If high, then voltage on VB2 input is lower than the UV threshold
0
V B1U V
R
If high, then voltage on VB1 input is lower than the UV threshold
T ABL E 42. BIT MAP F OR OVST AT RE GIST E R D9H (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7
Reserved
N/A
Cannot be used
6
V P4OV
R
If high, then voltage on VP4 input is higher than the OV threshold
5
V P3OV
R
If high, then voltage on VP3 input is higher than the OV threshold
4
V P2OV
R
If high, then voltage on VP2 input is higher than the OV threshold
3
V P1OV
R
If high, then voltage on VP1 input is higher than the OV threshold
2
V H OV
R
If high, then voltage on VH input is higher than the OV threshold
1
V B2O V
R
If high, then voltage on VB2 input is higher than the OV threshold
0
V B1O V
R
If high, then voltage on VB1 input is higher than the OV threshold
those of the fault registers with the exception that the
ANYFLT bit cannot be masked. Setting a 1 in the error
mask register results in the equivalent bit in the fault reg-
ister always remaining at 0, regardless of whether there is a
fault on that function or not. T he register and bit maps for
both the fault and error mask registers are shown below.
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