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參數資料
| 型號： | ADM1060ARU |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 電源管理 |
| 英文描述： | CON-HDR64POS2ROW 4WALL.1X.1SP,RTANG,LOPF |
| 中文描述： | 7-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO28 |
| 封裝： | MO-153AE, TSSOP-28 |
| 文件頁數： | 34/45頁 |
| 文件大小： | 303K |
| 代理商： | ADM1060ARU |
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ADM1060
ADM1060 STATUS/FAULTS
–
34
–
REV. PrJ 11/02
PRELIMINARY TECHNICAL DATA
FAULT REGISTERS
T ABL E 47. L IST OF F AUL T RE GIST E RS
Hex
T able
Addr.
Name
D efault
Power On Value
Description
D C
48
L AT F 1
00h
Fault Status Register for the 7 SFD
’
s
D D
49
L AT F 2
00h
Fault Status Register for the 4 GPI
’
s and the Watchdog Detector
T ABL E 48. BIT MAP F OR L AT F 1 RE GIST E R DC H (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7
ANY F L T
R
If high, then a change in logic status (fault) has been logged on one of the 12 func-
monitored since the last time the Fault Registers were read.
tions
6
V P4F L T
R
If high, then a fault has occurred on supply at input VP4
5
V P3F L T
R
If high, then a fault has occurred on supply at input VP3
4
V P2F L T
R
If high, then a fault has occurred on supply at input VP2
3
V P1F L T
R
If high, then a fault has occurred on supply at input VP1
2
V H F L T
R
If high, then a fault has occurred on supply at input VH
1
V B2F L T
R
If high, then a fault has occurred on supply at input VB2
0
V B1F L T
R
If high, then a fault has occurred on supply at input VB1
T ABL E 49. BIT MAP F OR L AT F 2 RE GIST E R DDH (POWE R- ON DE F AUL T 00H)
Bit
Name
R/W
Description
7-5
Reserved
N/A
Cannot be used
4
W D F L T
R
If high, then the logic level on the WDI output has changed since the last
time that the fault registers were read
3
G PI4F L T
R
If high, then the logic level on GPI4 input has changed since the last
time that the fault registers were read
2
G PI3F L T
R
If high, then the logic level on GPI3 input has changed since the last
time that the fault registers were read
1
G PI2F L T
R
If high, then the logic level on GPI2 input has changed since the last
time that the fault registers were read
0
G PI1F L T
R
If high, then the logic level on GPI1 input has changed since the last
time that the fault registers were read
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