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參數資料
型號： ADUuC7027BSTZ62-RL
廠商： Analog Devices, Inc.
英文描述： Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
中文描述： 精密模擬微控制器的12位模擬I / O，ARM7TDMI的微控制器
文件頁數： 25/92頁
文件大小： 850K
代理商： ADUUC7027BSTZ62-RL
ADuC7019/20/21/22/24/25/26/27
Pin No.
43
Rev. A | Page 25 of 92
Mnemonic
P0.7/ECLK/XCLK/SPM8/ PLAO[4]
Description
Serial Port Multiplexed. General-Purpose Input and Output Port 0.7/Output for External Clock
Signal/Input to the Internal Clock Generator Circuits/UART/Programmable Logic Array Output
Element 4.
Output from the Crystal Oscillator Inverter.
Input to the Crystal Oscillator Inverter and Input to the Internal Clock Generator Circuits.
General-Purpose Input and Output Port 3.6/External Memory Interface/PWM Safety Cut
Off/Programmable Logic Array Input Element 14.
General-Purpose Input and Output Port 3.7/External Memory Interface/PWM
Synchronization/Programmable Logic Array Input Element 15.
General-Purpose Input and Output Port 2.7/PWM Phase 1 Low-Side Output/External Memory
Select 3.
General-Purpose Input and Output Port 2.1/External Memory Write Strobe/PWM Phase 0
High-Side Output/Programmable Logic Array Output Element 6.
General-Purpose Input and Output Port 2.2/External Memory Read Strobe/PWM Phase 0 Low-
Side Output/Programmable Logic Array Output Element 7.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.7/UART, SPI/Programmable
Logic Array Output Element 0.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.6/UART, SPI/Programmable
Logic Array Input Element 6.
Ground for GPIO. Typically connected to DGND.
3.3 V Supply for GPIO and Input of the On-Chip Voltage Regulator.
General-Purpose Input and Output Port 4.0/External Memory Interface/Programmable Logic
Array Output Element 8.
General-Purpose Input and Output Port 4.1/External Memory Interface/Programmable Logic
Array Output Element 9.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.5/UART, SPI/Programmable
Logic Array Input Element 5/External Interrupt Request 3, Active High.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.4/UART, SPI/Programmable
Logic Array Input Element 4/External Interrupt Request 2, Active High.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.3/UART, I2C1/Programmable
Logic Array Input Element 3.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.2/UART, I2C1/Programmable
Logic Array Input Element 2.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.1/UART, I2C0/Programmable
Logic Array Input Element 1.
Serial Port Multiplexed. General-Purpose Input and Output Port 1.0/Timer1 Input/UART,
I
2
C0/Programmable Logic Array Input Element 0.
General-Purpose Input and Output Port 4.2/External Memory Interface/Programmable Logic
Array Output Element 10.
General-Purpose Input and Output Port 4.3/External Memory Interface/Programmable Logic
Array Output Element 11.
General-Purpose Input and Output Port 4.4/External Memory Interface/Programmable Logic
Array Output Element 12.
General-Purpose Input and Output Port 4.5/External Memory Interface/Programmable Logic
Array Output Element 13.
Ground for the Reference. Typically connected to AGND.
2.5 V Internal Voltage Reference. Must be connected to a 0.47 μF capacitor when using the
internal reference.
External Voltage Reference for the DACs. Range: DACGND to DACV
DD
.
Ground for the DAC. Typically connected to AGND.
Analog Ground. Ground reference point for the analog circuitry.
3.3 V Analog Power.
44
45
46
XCLKO
XCLKI
P3.6/AD6/PWM
TRIP
/PLAI[14]
47
P3.7/AD7/PWM
SYNC
/PLAI[15]
48
P2.7/PWM1
L
/MS3
49
P2.1/WS/PWM0
H
/PLAO[6]
50
P2.2/RS/PWM0
L
/PLAO[7]
51
P1.7/SPM7/PLAO[0]
52
P1.6/SPM6/PLAI[6]
53
54
55
IOGND
IOV
DD
P4.0/AD8/PLAO[8]
56
P4.1/AD9/PLAO[9]
57
P1.5/SPM5/PLAI[5]/IRQ3
58
P1.4/SPM4/PLAI[4]/IRQ2
59
P1.3/SPM3/PLAI[3]
60
P1.2/SPM2/PLAI[2]
61
P1.1/SPM1/PLAI[1]
62
P1.0/T1/SPM0/PLAI[0]
63
P4.2/AD10/PLAO[10]
64
P4.3/AD11/PLAO[11]
65
P4.4/AD12/PLAO[12]
66
P4.5/AD13/PLAO[13]
67
68
REFGND
V
REF
69
70
71, 72
73, 74
DAC
REF
DACGND
AGND
AV
DD
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