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參數資料
型號： ADV7180
廠商： Analog Devices, Inc.
英文描述： 10-Bit, 4 x Oversampling SDTV Video Decoder
中文描述： 10位，4個采樣標清視頻解碼器
文件頁數： 83/112頁
文件大小： 1320K
代理商： ADV7180
ADV7180
Rev. A | Page 83 of 112
Bits (Shading Indicates Default
State)
6
5
4
Comments
Subaddress
0x0F
Register
Power
Management
Bit Description
Reserved.
7
3
2
1
0
0
0
LQFP-64
Set to default
LFCSP-40
Notes
0
Chip power-down
controlled by pin
Bit has priority
(pin disregarded)
Set to default
System functional
Powered down
PDBP. Power-down
bit priority selects
between PWRDWN bit
or pin control.
1
Reserved.
PWRDWN. Power-
down places the
decoder into a full
power-down mode.
Reserved.
RESET. Chip reset, loads
all I
2
C bits with default
values.
0
1
0
0
See PDBP, 0x0F Bit 2
0
0
Set to default
Normal operation
1
Start reset sequence
Executing reset takes
approx. 2 ms; this bit is
self-clearing
Provides information
about the internal status
of the decoder
0x10
IN_LOCK.
LOST_LOCK.
FSC_LOCK.
FOLLOW_PW.
x
x
x
x
1 = in lock (now)
1 = lost lock (since last read)
1 = F
SC
lock (now)
1 = peak white
AGC mode active
NTSM M/J
NTSC 4.43
PAL M
PAL 60
PAL B/G/H/I/D
SECAM
PAL Combination N
SECAM 525
1 = color kill is active
Status Register 1
(Read Only)
0x11
IDENT (Read Only)
x
0
0
0
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
1
1
0
1
1
AD_RESULT[2:0].
Autodetection result
reports the standard of
the input video.
Detected standard
COL_KILL.
IDENT[7:0]. Provides
identification on the
revision of the part.
MVCS DET.
MVCS T3.
Color kill
Power-up value = 0x1B
0x12
x
x
MV color striping detected
MV color striping type
1 = detected
0 = Type 2
1 = Type 3
1 = detected
1 = detected
1 = detected
1 = detected
Unfiltered
0x13
MV PS DET.
MV AGC DET.
LL NSTD.
FSC NSTD.
Reserved.
INST_HLOCK.
x
x
x
x
x
x
x
MV pseudosync detected
MV AGC pulses detected
Nonstandard line length
F
SC
frequency nonstandard
1 = horizontal lock
achieved
1 = Gemstar data detected
SD 60 Hz detected
SD 50 Hz detected
Y/C signal detected
CVBS signal detected
1 = free-run mode active
1 = field length standard
1 = interlaced video detected
1 = swinging burst detected
Status Register 2
(Read Only)
GEMD.
SD_OP_50Hz.
x
x
x
x
0
1
0
1
x
SD field rate detect
CVBS.
Result of CVBS and
Y/C autodetection
FREE_RUN_ACT.
STD FLD LEN.
INTERLACED.
PAL_SW_LOCK.
Blue screen output
Correct field length found
Field sequence found
Reliable swinging burst
sequence
Status Register 3
(Read Only)
Reserved.
CCLEN. Current clamp
enable allows the user
to switch off the
current sources in the
analog front.
Reserved.
0
1
0
0
1
0
Set to default
Current sources switched off
Current sources enabled
0x14
Analog Clamp
Control
0
0
0
Set to default
相關PDF資料
PDF描述
ADV7180BCPZ 10-Bit, 4 x Oversampling SDTV Video Decoder
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相關代理商/技術參數
參數描述
ADV7180_12 制造商:AD 制造商全稱:Analog Devices 功能描述:10-Bit, 4?? Oversampling SDTV Video Decoder
ADV7180BCP32Z 制造商:Analog Devices 功能描述:10-BIT, 4? OVERSAMPLING SDTV VIDEO DECODER - Trays
ADV7180BCP32Z-RL 制造商:Analog Devices 功能描述:IC
ADV7180BCPZ 功能描述:IC VIDEO DECODER SDTV 40-LFCSP RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 標準包裝:250 系列:- 類型:電平移位器 應用:LCD 電視機/監控器 安裝類型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤 供應商設備封裝:28-WQFN（4x4）裸露焊盤 包裝:帶卷 (TR) 其它名稱:296-32523-2TPS65198RUYT-ND
ADV7180BCPZ 制造商:Analog Devices 功能描述:IC VIDEO DECODER 10BIT 57.27MSPS LFCSP40
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