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參數資料
型號： ISP1761
廠商： NXP Semiconductors N.V.
英文描述： Hi-Speed Universal Serial Bus On-The-Go controller
中文描述： 高速通用串行總線和On - The - Go控制器
文件頁數： 34/158頁
文件大小： 724K
代理商： ISP1761
9397 750 13258
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 January 2005
34 of 158
Philips Semiconductors
ISP1761
Hi-Speed USB OTG controller
[1]
For details on register bit description, refer to Enhanced Host Controller Interface Specification for Universal
Serial Bus Rev. 1.0
8.2 EHCI operational registers
8.2.1
USBCMD register (R/W: 0020h)
The USB Command (USBCMD) register indicates the command to be executed by the
serial Host Controller. Writing to this register causes a command to be executed.
Table 15
shows the USBCMD register bit allocation.
Table 13:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HCCPARAMS register: bit allocation
31
30
29
28
27
26
25
24
reserved
0
R
23
0
R
22
0
R
21
0
R
20
0
R
19
0
R
18
0
R
17
0
R
16
reserved
0
R
15
0
R
14
0
R
13
0
R
12
0
R
11
0
R
10
0
R
9
0
R
8
EECP[7:0]
0
R
7
0
R
6
0
R
5
0
R
4
0
R
3
0
R
2
0
R
1
0
R
0
IST[3:0]
reserved
0
R
ASPC
1
R
PFLF
1
R
64AC
0
R
1
R
0
R
0
R
0
R
Table 14:
Bit
31 to 16 -
15 to 8
HCCPARAMS register: bit description
Symbol
Description
[1]
reserved; write logic 0
EECP[7:0]
EHCI Extended Capabilities Pointer
: Default = implementation
dependent. This optional field indicates the existence of a capabilities list.
IST[3:0]
Isochronous Scheduling Threshold
: Default = implementation
dependent. This field indicates, relative to the current position of the
executing Host Controller, where software can reliably update the
isochronous schedule.
-
reserved; write logic 0
ASPC
Asynchronous Scheduling Park Capability
: Default = implementation
dependent. If this bit is set to logic 1, the Host Controller supports the park
feature for high-speed queue heads in the Asynchronous Schedule.
PFLF
Programmable Frame List Flag
: Default = implementation dependent. If
this bit is cleared, the system software must use a frame list length of
1024 elements with this Host Controller.
If PFLF is set, the system software can specify and use a smaller frame
list and configure the host through the USBCMD register FLS field.
64AC
64-bit addressing capability
: This field documents the addressing range
capability.
7 to 4
3
2
1
0
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相關代理商/技術參數
參數描述
ISP1761BE 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,518 功能描述:USB 接口集成電路 USB HS OTG CONTROLLER RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,551 功能描述:USB 接口集成電路 DO NOT USE ORDER -T OR NO "-" RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE,557 功能描述:USB 接口集成電路 USB HS OTG CTRLR RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1761BE518 制造商:ST-Ericsson 功能描述:IC CONTROLLER USB OTG 128LQFP
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