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參數資料
| 型號： | TSC2117IRGZT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, QCC48 |
| 封裝： | 7 X 7 MM, GREEN, PLASTIC, VQFN-48 |
| 文件頁數： | 172/192頁 |
| 文件大?。?/td> | 2728K |
| 代理商： | TSC2117IRGZT |
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5.7.7
Reading X-Y Data in Non-Buffer Mode From SPI
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
Depending on how the user is reading data, the FIFO can become empty or full. If the user is trying to
read data even if the FIFO is empty, then RDPTR keeps pointing to same location. If the FIFO becomes
full, then the next location is overwritten with newly converted data values, and the read pointer is
incremented by one.
While reading the FIFO, the TSC2117 provides FIFO-empty and -full status flags along with the data. The
user can also read a status flag from page 3/register 13, bits D1–D0. See Table 5-39 for buffer-mode
control and Table 5-40 for buffer-mode 16-bit read-data format.
Table 5-39. Buffer Mode Control (Page 3/Register 18, Bits D7–D5)(1)
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
0: SPI interface is used for buffer data reading.
D7
R/W
0
1: I2C interface is used for buffer data reading.
0: SAR/buffer data update is automatically halted (to avoid simultaneous buffer read and
D6
R/W
0
write operations) based on internal detection logic.
1: SAR/buffer data update is held using software control (page 3/register 18, bit D5).
0: SAR/buffer data update is enabled all the time (valid only if page 3/register 18,
bit D6 = 1).
D5
R/W
0
1: SAR/buffer data update is stopped so that user can read the last updated data without
any data corruption. (Valid only if page 3/register 18, bit D6 = 1).
(1)
To enable buffer mode, write a 1 to page 3/register 13, bit D7.
Table 5-40. Buffer Mode 16-Bit Read Data Format (Page 252/Registers 1 and 2)
BUFFER
RESET
READ DATA
NAME
DESCRIPTION
COMMENT
VALUE
BIT
Buffer-full flag – This flag indicates that all the 64 locations of
D15
FUF
0
Page 252/register 1, bit D7
the buffer contain unread data.
Buffer Empty Flag - This flag indicates that there is no
D14
EMF
1
un-read data available in FIFO. This is generated while
Page 252/register 1, bit D6
reading the last converted data.
D13
X
Reserved
Page 252/register 1, bit D5
Data identification:
0 = X or Z1 coordinate or BAT or AUX2 data in R11–R0
1 = Y or Z2 coordinate or AUX1 or TEMP data in R11–R0
Order for writing data in buffer when multiple inputs are
selected:
D12
ID
X
For XY conversion: Y, X
Page 252/register 1, bit D4
For XYZ1Z2 conversion: Y, X, Z1, Z2
For Z1Z2 conversion: Z1, Z2
For autoscan conversion: AUX1 (if selected), AUX2 (if
selected), TEMP (if selected)
For port-scan conversion: BAT, AUX1, AUX2
Page 252/register 1, bits
D11–D8
R11–R8
X
Converted data (MSB, 4 bits)
D3–D0
Page 252/register 2, bits
D7–D0
R7–R0
X
Converted data (LSB, 8 bits)
D7–D0
Reading from the TSC2117 is done by using the protocol called out in Figure 5-47. This protocol uses a
24-clock sequence to get a 16-bit data read. Set the GPIO1 or GPIO2 interrupt for monitoring the
data-available status by writing to page 3/register 3, bits D1 and D0. Reading is normally done when the
interrupt is low (data is available for reading). Status from the ADC conversion can be read from
page 3/register 9. If bit D6 is set, then the ADC is actively converting, so a BUSY status is read. If bit D5 is
set, then some data is now available for reading. If bit D3 is set, then the X-coordinate data can be read,
and if bit D2 is set, then the Y-coordinate data can be read.
The first 7 bits in the read sequence are for the first register address of the two sequential 8-bit registers.
APPLICATION INFORMATION
80
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