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參數資料
型號： 935269580557
廠商： NXP SEMICONDUCTORS
元件分類： 消費家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, HTQFP-100
文件頁數： 34/84頁
文件大小： 1054K
代理商： 935269580557
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
9397 750 08865
4 of 84
Rev. 02 — 8 October 2001
Product data
PNX8510/11
Philips Semiconductors
Analog Companion Chip
Table 5: Special Interface/Display Modes
Display/Interface Modes
Mode
Interface Speed
24-bit RGB/YUV
Both D1 interfaces and the secondary audio channel are combined to provide
high-speed direct access to video DACs
.
Note: In case of the 24/30-bit full parallel input, no secondary audio channel is
available.
24-bit direct
RGB/YUV
8/10-bit
up to 81 MHz
Single interface mode 2 (D1)
Accommodates 2 synchronous multiplexed D1 streams for low cost applications
(both streams are extracted)
2x muxed 4:2:2
single D1
8/10-bit
54 MHz
Interleaved interface mode
Same formats as in single interface mode 1 and 2 but only one of the two
interleaved video streams is extracted per interface.
Selection of the extracted slice is possible by software,
Usage of two PNX8510/11 chips possible to support up to 4 display/record devices
2x muxed 4:2:2
single D1
or
2x muxed
4:4:4
RGB/YUV
8/10-bit
54 MHz or
81 MHz or
pos-neg edge 27 MHz
(SAA7128 compliant)
Combined double D1 mode: the two D1 interfaces are combined to carry a single
HDTV stream in 4:2:2 YUV or 4:2:2 YPrPb format
primary D1: Y channel
secondary D1: muxed UV or PrPb channel
i.e.: 1920x1080 60 Hz interlaced
2200 pixel/line x 562.5 lines/field x 60 Hz = 74.25 MHz/Y samples
37.125 MHz/Cr/Pr samples
37.125 MHz/Cb/Pb samples
Note: In case of the combined double D1 mode, no secondary display channel is
available.
2 combined D1
8/10-bit
up to 75 MHz
per D1
Pin Assignment 24-Bit Mode
red[7] - I2S_IN2_SD
red[6] - I2S_IN2_WS
red[5] - I2S_IN2_SCK
red[4] - I2S_AOS2_CLK
red[3] - DV_IN1[9]
red[2] - DV_IN1[8]
red[1] - DV_IN1[7]
red[0] - DV_IN1[6]
green[7] - DV_IN1[5]
green[6] - DV_IN1[4]
green[5] - DV_IN1[3]
green[4] - DV_IN1[2]
green[3] - DV_IN1[1]
green[2] - DV_IN1[0]
green[1] - DV_IN2[9]
green[0] - DV_IN2[8]
blue[7] - DV_IN2[7]
blue[6] - DV_IN2[6]
blue[5] - DV_IN2[5]
blue[4] - DV_IN2[4]
blue[3] - DV_IN2[3]
blue[2] - DV_IN2[2]
blue[1] - DV_IN2[1]
blue[0] - DV_IN2[0
Pin Assignment 30-Bit Mode
red[9] - I2S_IN2_SD
red[8] - I2S_IN2_WS
red[7] - I2S_IN2_SCK
red[6] - I2S_AOS2_CLK
red[5] - DV_IN1[9]
red[4] - DV_IN1[8]
red[3] - DV_IN1[7]
red[2] - DV_IN1[6]
red[1] - GPIO[5]
red[0] - GPIO[4]
green[9] - DV_IN1[5]
green[8] - DV_IN1[4]
green[7] - DV_IN1[3]
green[6] - DV_IN1[2]
green[5] - DV_IN1[1]
green[4] - DV_IN1[0]
green[3] - DV_IN2[9]
green[2] - DV_IN2[8]
green[1] - GPIO[3]
green[0] - GPIO[2]
blue[9] - DV_IN2[7]
blue[8] - DV_IN2[6]
blue[7] - DV_IN2[5]
blue[6] - DV_IN2[4]
blue[5] - DV_IN2[3]
blue[4] - DV_IN2[2]
blue[3] - DV_IN2[1]
blue[2] - DV_IN2[0]
blue[1] - GPIO[1]
blue[0] - DV_CLK2
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