
Koninklijke Philips Electronics N.V. Copyright 2001. All rights reserved.
9397 750 08865
14 of 84
Rev. 02 — 8 October 2001
Product data
PNX8510/11
Philips Semiconductors
Analog Companion Chip
Chrominance is modified in gain (programmable separately for U and V). The standard
dependent burst is inserted before baseband color signals are interpolated from a 6.75 MHz
data rate to a 27 MHz data rate.
One of the interpolation stages can be bypassed, thus providing a higher color bandwidth, which
can be used for Y and C output. The FSC bits set the subcarrier frequency. To make sure the
subcarrier is locked to the line frequency, as the standards require, the sync generator is able to
reset the subcarrier generation periodically. This feature is controlled by the PHRES
programming bits. These features are available to generate a standard interlaced signal; they
will not work in non-interlaced mode.
A crystal-stable master clock of 27 MHz, which is twice the CCIR line-locked pixel clock of
13.5 MHz, is received from the interface clock pins. The encoder synthesizes all necessary
internal signals, color subcarrier frequency, and synchronization signals from that clock.
For ease of analog post filtering, the signals are twice oversampled with respect to the pixel
clock before digital-to-analog conversion.
Programming flexibility includes NTSC-M, PAL-B, SECAM main standards as well as other
variations. A number of possibilities are provided for setting different video parameters, such as:
Black and blanking level control
Color subcarrier frequency
Variable burst amplitude
The sync generator generates all the signals required to control the signal processing, provide
the composite sync signal, insert the color burst, etc.
The encoder includes a cross-color reduction filter to reduce cross talk between the luminance
and chrominance channels. In the CVBS signal, the signal amplitude is reduced by 15/16 to
avoid overflow.
2.6.2 Luminance and Chrominance Processing
The Y processing provides a high performance 5 MHz lowpass filter. It adjusts the level range
according to the standard and inserts the sync and blanking pulses. The insertion stage
generates the correct pulse shapes. No further processing is necessary of the D/A converters for
this purpose.
Chroma processing operates on the baseband signals as long as possible. At first, the signal
amplitudes are adjusted and the burst is inserted. Afterwards the signals are passed through a
1.4 MHz lowpass filter. This filter can be switched to a higher cut-off frequency to allow more
chroma bandwidth with S-Video. The quadrature modulator uses a DTO with 32-bits resolution
for the subcarrier generation. Even with this high resolution, the DTO cannot generate the carrier
locked to the line frequency as the standards require without further means. So the sync
generator is able to reset the DTO periodically. This feature is controlled by the PHRES
programming bits. These modes may only be switched on if the encoder is programmed to
generate a standard signal; they will not work in non-interlaced mode.
2.6.3 Sync Generator
The sync generator is the timing master of the encoder. It generates all the signals required to
control the signal processing, provide the composite sync signal, insert the color burst, etc. Via
the FISE control bit, the circuit can be set to generate 50 Hz patterns for e.g., PAL B or 60 Hz
patterns (NTSC M). It is possible to modify the number of lines per field by ±0.5 lines to generate
a non-interlaced output signal. The sync generator also provides HS, VS and O_E signals to
control the rest of the encoder.