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參數(shù)資料
| 型號(hào)： | AD7730LBR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Bridge Transducer ADC |
| 中文描述： | 2-CH DELTA-SIGMA ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | SOIC-24 |
| 文件頁數(shù)： | 2/52頁 |
| 文件大小： | 497K |
| 代理商： | AD7730LBR |
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–2–
REV. A
Parameter
B Version
1
Units
Conditions/Comments
ST AT IC PERFORMANCE (CHP = 1)
No Missing Codes
2
Output Noise and Update Rates
2
Integral Nonlinearity
Offset Error
2
Offset Drift vs. T emperature
2
Offset Drift vs. T ime
4
Positive Full-Scale Error
2, 5
Positive Full-Scale Drift vs T emp
2, 6, 7
Positive Full-Scale Drift vs T ime
4
Gain Error
2, 8
Gain Drift vs. T emperature
2, 6, 9
Gain Drift vs. T ime
4
Bipolar Negative Full-Scale Error
2
Negative Full-Scale Drift vs. T emp
2, 6
Power Supply Rejection
Common-Mode Rejection (CMR)
Analog Input DC Bias Current
2
Analog Input DC Bias Current Drift
2
Analog Input DC Offset Current
2
Analog Input DC Offset Current Drift
2
ST AT IC PERFORMANCE (CHP = 0)
2
No Missing Codes
Output Noise and Update Rates
Integral Nonlinearity
Offset Error
Offset Drift vs. T emperature
6
Offset Drift vs. T ime
4
Positive Full-Scale Error
5
Positive Full-Scale Drift vs. T emp
6, 7
Positive Full-Scale Drift vs. T ime
4
Gain Error
8
Gain Drift vs. T emperature
6, 9
Gain Drift vs. T ime
4
Bipolar Negative Full-Scale Error
Negative Full-Scale Drift vs. T emp
Power Supply Rejection
Common-Mode Rejection (CMR) on AIN
CMR on REF IN
Analog Input DC Bias Current
Analog Input DC Bias Current Drift
Analog Input DC Offset Current
Analog Input DC Offset Current Drift
24
See T ables I & II
18
See Note 3
5
25
See Note 3
2
10
See Note 3
2
10
See Note 3
2
120
120
50
100
10
50
Bits min
ppm of FSR max
Offset Error and Offset Drift Refer to Both
Unipolar Offset and Bipolar Zero Errors
nV/
°
C typ
nV/1000 Hours typ
ppm of FS/
°
C max
ppm of FS/1000 Hours typ
ppm/
°
C max
ppm/1000 Hours typ
ppm of FS/
°
C max
dB typ
dB min
nA max
pA/
°
C typ
nA max
pA/
°
C typ
Measured with Zero Differential Voltage
At DC. Measured with Zero Differential Voltage
24
See T ables III & IV
18
See Note 3
0.5
2.5
See Note 3
0.6
3
See Note 3
2
10
See Note 3
0.6
90
100
120
60
150
30
100
Bits min
SK IP = 0
10
ppm of FSR max
Offset Error and Offset Drift Refer to Both
Unipolar Offset and Bipolar Zero Errors
μ
V/
°
C typ
μ
V/1000 Hours typ
μ
V/
°
C typ
μ
V/1000 Hours typ
ppm/
°
C typ
ppm/1000 Hours typ
μ
V/
°
C typ
dB typ
dB typ
dB typ
nA max
pA/
°
C typ
nA max
pA/
°
C typ
Measured with Zero Differential Voltage
At DC. Measured with Zero Differential Voltage
At DC. Measured with Zero Differential Voltage
ANALOG INPUT S/REFERENCE INPUT S
Normal-Mode 50 Hz Rejection
2
Normal-Mode 60 Hz Rejection
2
Common-Mode 50 Hz Rejection
2
Common-Mode 60 Hz Rejection
2
Analog Inputs
Differential Input Voltage Ranges
11
88
88
120
120
dB min
dB min
dB min
dB min
From 49 Hz to 51 Hz
From 59 Hz to 61 Hz
From 49 Hz to 51 Hz
From 59 Hz to 61 Hz
Assuming 2.5 V or 5 V Reference with
HIREF Bit Set Appropriately
Gain = 250
Gain = 125
Gain = 62.5
Gain = 31.25
0 to +10 or
±
10
0 to +20 or
±
20
0 to +40 or
±
40
0 to +80 or
±
80
AGND + 1.2 V
AV
DD
– 0.95 V
mV nom
mV nom
mV nom
mV nom
V min
V max
Absolute/Common-Mode Voltage
12
Reference Input
REF IN(+) – REF IN(–) Voltage
REF IN(+) – REF IN(–) Voltage
Absolute/Common-Mode Voltage
13
+2.5
+5
AGND – 30 mV
AV
DD
+ 30 mV
0.3
0.65
V nom
V nom
V min
V max
V min
V max
HIREF Bit of Mode Register = 0
HIREF Bit of Mode Register = 1
NO REF T rigger Voltage
NO REF Bit Active If V
REF
Below T his Voltage
NO REF Bit Inactive If V
REF
Above T his Voltage
AD7730–SPECIFICATIONS
(AV
DD
= +5V, DV
DD
= +3V or +5V; REF IN+) = AV
DD
; REFIN–) = AGND = DGND =
0V; f
CLK IN
= 4.9152 MHz. All specifications T
MN
to T
MAX
unless otherwse noted.)
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