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參數(shù)資料
型號(hào)： AD9929BBCZ
廠商： ANALOG DEVICES INC
元件分類： 消費(fèi)家電
英文描述： CCD Signal Processor with Precision Timing Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PBGA64
封裝： 9 X 9 MM, LEAD FREE, PLASTIC, MO-205-AB, CSBGA-64
文件頁(yè)數(shù)： 30/64頁(yè)
文件大小： 558K
代理商： AD9929BBCZ
AD9929
Rev. A | Page 30 of 64
VD
1
2
CLPOB
HD
12-BIT
GRAY COUNTER
+ SET-UP
PROGRAMMABLE CLOCK POSITIONS
1. CLPTOG1 (SYS_REG (15))
2. CLPTOG2 (SYS_REG (15 AND 16))
0
Figure 25. Location of CLPOB using CLPTOG1 and CLPTOG2 Registers.
VD
HD
0
1
2
3
4
5
6
7
8
9
10
11
12
CLPOB
CLPMASK
(INTERNAL)
A
B
PROGRAMMING POSITIONS
1. SCP0 = 0 (FIXED), CLPEN0 = 1
2. SCP1 = 3, CLPEN1 = 0
3. SCP2 = 4, CLPEN2 = 1
4. SCP3 = 5, CLPEN3 = 0
5. SCP4 = 1, CLPEN4 = 1
NOTES
1. THE INTERNAL CLPMASK SIGNAL EXTENDS ONE EXTRA HD CYCLE FROM WHEN THE CLPMASK PERIOD CHANGES FROM LOW TO HIGH.
AS A RESULT, ONE ADDITIONAL CLPOB PULSE IS MASKED AS SHOWN AT POSITIONS A AND B.
Figure 26. CLPOB Outputs with CLPMODE = 0
13
14
15
16
1
2
3
4
5
0
CONTROLLING CLPOB CLAMP PULSE OUTPUTS
The registers in Table 19 are used for programming the CLPOB
pulse. The CLPOB pulse is disabled in all CCD regions by
setting CLPCNT = 0. The CLPTOGx (x = 0, 1) are used to set
the CLPOB toggle positions. The CLPENx (x = 0, 1, 2, 3, and 4)
are used to enable or disable the CLPOB pulse separately in
each CCD region when CLPMODE = 0. The CLPEN registers
have no effect if CLPMODE = 1. In this case, the CLPOB pulse
is asserted in all CCD regions, regardless of the value set in the
CLPENx registers.
Figure 26 shows an example of the CLPOB pulse being disabled
in CCD Regions 1 and 3 by setting CLPEN1 = 1 and
CLPEN3 =1. Note that the CLPOB pulse remains disabled in
the first line of the following CCD region.
Table 20. SCP and CLPEN
SCP[4:1]
1
SCP0
SCP1
SCP2
SCP3
SCP4
CLPEN[4:0]
CLPEN0
CLPEN1
CLPEN2
CLPEN3
CLPEN4
1
SCP0 is not a programmable register and therefore not listed in the register
map tables. SCP0 is a fixed sequence and always starts at the falling edge of
VD. Although this register is not programmable, the CLPEN0 register is still
used to set whether the CLPOB pulse is enabled or disabled for this SCP0
region.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9929BBCZRL 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述:
AD9937 制造商:AD 制造商全稱:Analog Devices 功能描述:CCD Signal Processor with Precision Timing⑩ Generator
AD9937BCPZ-24 制造商:Analog Devices 功能描述:
AD9937BCPZ-27 功能描述:IC CCD SIGNAL PROC/GEN 制造商:analog devices inc. 系列:* 零件狀態(tài):上次購(gòu)買時(shí)間 標(biāo)準(zhǔn)包裝:1
AD9937BCPZRL-24 制造商:Analog Devices 功能描述:
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