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參數資料
| 型號： | AD9929BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processor with Precision Timing Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA64 |
| 封裝： | 9 X 9 MM, LEAD FREE, PLASTIC, MO-205-AB, CSBGA-64 |
| 文件頁數： | 9/64頁 |
| 文件大?。?/td> | 558K |
| 代理商： | AD9929BBCZ |
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AD9929
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Rev. A | Page 9 of 64
A
B
C
D
E
F
G
H
J
K
AD9929
TOP VIEW
(Not to Scale)
1 2 3 4 5 6 7 8 9 10
A 1 CORNER
INDEX AREA
0
Figure 2. Pin Configuration
Table 7. Pin Function Descriptions
Pin
Mnemonic Type
1
Description
D1
VD
DIO
Vertical Sync Pulse (Input for Slave
Mode, Output for Master Mode)
Horizontal Sync Pulse (Input for
Slave Mode, Output for Master
Mode)
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Output
Data Clock Output
Data Output Driver Ground
Data Output Driver Supply
CCD Substrate Clock
(2 Level: VH2, VL)
CCD Vertical Transfer Clock
(3 Level: VH1, VM1, VL)
CCD Vertical Transfer Clock
(2 Level: VM2, VL)
CCD Vertical Transfer Clock
(3 Level: VH1, VM1, VL)
CCD Vertical Transfer Clock
(2 Level: VM2, VL)
Vertical Driver High Supply
(High Supply for V1 and V3)
Vertical Driver Midsupply
(Midsupply for V1 and V3)
Vertical Driver Midsupply
(Midsupply for V2 and V4)
Vertical Driver Low Supply
Vertical Driver High Supply for
SUBCK
D2
HD
DIO
B8
A8
A7
B7
A6
B6
B5
A4
B3
A3
B2
A2
A1
B4
A5
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
DCLK1
DRVSS
DRVDD
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
DO
P
P
G9
SUBCK
DO
D10 V1
DO
E9
V2
DO
G10 V3
DO
H9
V4
DO
H10 VH1
P
C10 VM1
P
F10
VM2
P
F9
VL
P
E10
VH2
P
1
AI = Analog Input, AO = Analog Output, DI = Digital Input,
DO = Digital Output, DIO = Digital Input/Output, P = Power.
Pin
B10
J9
A9
G1
F1
E1
E2
F2
G2
H1
J1
H2
Mnemonic
VDD
VDVSS
VSUB
H1
H2
HVDD
HVSS
HVSS
HVSS
RG
RGVDD
RGVSS
SYNC or
VGATE
FD or
DCLK2
AVDD
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
AVSS
CLI
TCVDD
TCVSS
CCDIN
REFT
REFB
SDATA
SL
SCK
OUTCONT
MSHUT
STROBE
DVDD
DVSS
Type
1
Description
P
Vertical Driver Input Logic Supply
P
Vertical Driver Ground
DO
CCD Substrate Bias
DO
CCD Horizontal Clock
DO
CCD Horizontal Clock
P
H1 and H2 Driver Supply
P
H1 and H2 Driver Ground
P
H1 and H2 Driver Ground
P
H1 and H2 Driver Ground
DO
CCD Reset Gate Clock
P
RG Driver Supply
P
RG Driver Ground
DI
DI
VGATE Input
DO
DO
DCLK2 Output
P
Analog Supply for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
P
Analog Ground for AFE
DI
Reference Clock Input
P
Analog Supply for Timing Core
P
Analog Ground for Timing Core
AI
CCD Input Signal
AO
Voltage Reference Top Bypass
AO
Voltage Reference Bottom Bypass
DI
3-Wire Serial Data Input
DI
3-Wire Serial Load Pulse
DI
3-Wire Serial Clock
DI
Output Control
DO
Mechanical Shutter Pulse
DO
Strobe Pulse
P
Digital Supply
P
Digital Ground
C9
External System Sync Input
C1
Field Designator Output
K3
J3
J4
J5
J6
J7
J8
K4
K6
J2
K2
K1
K5
K7
K8
K9
K10
J10
D9
B1
C2
A10
B9
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