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參數資料
| 型號： | ISP1183BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Low-power Universal Serial Bus interface device with DMA |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32 |
| 文件頁數： | 14/62頁 |
| 文件大小： | 295K |
| 代理商： | ISP1183BS |
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Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
14 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
10. Endpoint description
Each USB device is logically composed of several independent endpoints. An
endpoint acts as a terminus of a communication flow between the host and the
device. At design time, each endpoint is assigned a unique number (endpoint
identifier, see
Table 4
). The combination of the device address (given by the host
during enumeration), the endpoint number, and the transfer direction allows each
endpoint to be uniquely referenced.
The ISP1183 has 16 endpoints: endpoint 0 (control IN and OUT) plus 14 configurable
endpoints, which can be individually defined as interrupt, bulk or isochronous—IN or
OUT. Each enabled endpoint has an associated FIFO, which can be accessed either
using the parallel I/O interface or DMA.
10.1 Endpoint access
Table 4
lists the endpoint access modes and programmability. All endpoints support
I/O mode access. Endpoints 1 to 14 also support DMA access. FIFO DMA access is
selected and enabled through bits EPDIX[3:0] and DMAEN of the DMA Configuration
register. A detailed description of the DMA operation is given in
Section 11
.
[1]
[2]
The total amount of FIFO storage allocated to enabled endpoints must not exceed 2462 bytes.
IN: input for the USB host (ISP1183 transmits); OUT: output from the USB host (ISP1183 receives). The data flow direction is
determined by bit EPDIR in the Endpoint Configuration register.
10.2 Endpoint FIFO size
The FIFO size determines the maximum packet size that the hardware can support
for a given endpoint. Only enabled endpoints are allocated space in the shared FIFO
storage, disabled endpoints have zero bytes.
Table 5
lists programmable FIFO sizes.
The following bits in the Endpoint Configuration register (ECR) affect FIFO allocation:
Endpoint enable bit (FIFOEN)
Size bits of an enabled endpoint (FFOSZ[3:0])
Isochronous bit of an enabled endpoint (FFOISO).
Remark:
Register changes that affect the allocation of the shared FIFO storage
among endpoints must
not
be made while valid data is present in any FIFO of the
enabled endpoints. Such changes will render
all
FIFO contents
undefined
.
Table 4:
Endpoint
identifier
0
0
1 to 14
Endpoint access and programmability
FIFO size (bytes)
[1]
Double buffering
I/O mode
access
yes
yes
supported
DMA mode
access
no
no
supported
Endpoint type
64 (fixed)
64 (fixed)
programmable
no
no
supported
control OUT
[2]
control IN
[2]
programmable
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BSFA | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS-S | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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