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參數資料
型號: ISP1183BS
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: Low-power Universal Serial Bus interface device with DMA
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC32
封裝: 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32
文件頁數: 30/62頁
文件大?。?/td> 295K
代理商: ISP1183BS
Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
30 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13.1.5
Interrupt Enable register (R/W: C3H/C2H)
This command individually enables or disables interrupts from all endpoints, as well
as interrupts caused by events on the USB bus (SOF, SOF lost, EOT, suspend,
resume, reset). A bus reset will not change any of the programmed bit values.
The command accesses the Interrupt Enable register that consists of 4 bytes. The bit
allocation is given in
Table 22
.
Table 20:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Hardware Configuration register: bit allocation
15
14
reserved
EXTPUL
0
0
R/W
R/W
7
6
DAKOLY
DRQPOL
0
1
R/W
R/W
13
12
11
10
9
8
reserved
1
R/W
5
DAKPOL
0
R/W
CLKRUN
0
R/W
4
reserved
0
R/W
reserved
0
0
1
1
R/W
3
R/W
2
R/W
1
INTLVL
0
R/W
R/W
0
WKUPCS
0
R/W
reserved
1
R/W
reserved
0
R/W
Table 21:
Bit
15
14
Hardware Configuration register: bit description
Symbol
Description
-
reserved
EXTPUL
Logic 1 indicates that an external 1.5 k
pull-up resistor is used
on pin DP and that SoftConnect is not used. Bus reset value:
unchanged.
-
reserved
CLKRUN
Logic 1 indicates that the internal clocks are always running,
even during the suspend state. Logic 0 switches off the internal
oscillator and PLL, when they are not needed. During the
suspend state, this bit must be made logic 0 to meet the suspend
current requirements. The clock is stopped after a delay of
approximately 2 ms, following the setting of bit GOSUSP in the
Mode register. Bus reset value: unchanged.
-
reserved
DAKOLY
Logic 1 selects the DACK-only DMA mode. Logic 0 selects the
8237 compatible DMA mode. Bus reset value: unchanged.
DRQPOL
Selects DREQ signal polarity (0 = active LOW, 1 = active HIGH).
Bus reset value: unchanged.
DAKPOL
Selects DACK signal polarity (0 = active LOW, 1 = active HIGH).
Bus reset value: unchanged.
reserved
This bit should be always written as logic 0.
WKUPCS
Logic 1 enables remote wake-up through a LOW level on input
CS_N (For wake-up on CS_N to work, V
BUS
must be present).
Bus reset value: unchanged.
-
reserved
INTLVL
Selects the interrupt signaling mode on output INT (0 = level,
1 = pulsed). In the pulsed mode, an interrupt produces 166 ns
pulse. For details, see
Section 12
. Bus reset value: unchanged.
reserved
This bit should be always written as logic 0.
13
12
11 to 8
7
6
5
4
3
2
1
0
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相關代理商/技術參數
參數描述
ISP1183BS,118 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,151 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BS,157 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
ISP1183BSFA 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA,便攜式音頻/視頻,智能電話 接口:I²C,2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤(4x4) 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2
ISP1183BS-S 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20
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