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參數資料
| 型號： | ISP1183BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線控制器 |
| 英文描述： | Low-power Universal Serial Bus interface device with DMA |
| 中文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC32 |
| 封裝： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32 |
| 文件頁數： | 36/62頁 |
| 文件大小： | 295K |
| 代理商： | ISP1183BS |
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Philips Semiconductors
ISP1183
Low-power USB interface device with DMA
Product data
Rev. 01 — 24 February 2004
36 of 62
9397 750 11804
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
13.2.7
Acknowledge Setup (F4H)
This command acknowledges to the host that a SETUP packet was received. The
arrival of a SETUP packet disables the Validate Buffer and Clear Buffer commands
for the control IN and OUT endpoints. The microcontroller needs to re-enable these
commands by sending an Acknowledge Setup command, see
Section 10.5
.
Code (hex): F4 —
acknowledge setup
Transaction —
none
13.3 DMA commands
13.3.1
DMA Function and Scratch register (R/W: B3H/B2H)
This command accesses the 16-bit DMA Function and Scratch register, which can be
used by the firmware to save and restore information. For example, the device status
before powering down in the suspend state. The register bit allocation is given in
Table 30
.
Code (hex): B2/B3 —
write or read DMA Function and Scratch register
Transaction —
write or read 2 bytes
3
OVERWRITE
This bit is set by hardware. Logic 1 indicates that a new Setup
packet has overwritten the previous setup information, before it
was acknowledged or before the endpoint was stalled. This bit is
cleared by reading, if writing the setup data has finished.
Firmware must check this bit before sending an Acknowledge
Setup command or stalling the endpoint. On reading logic 1, the
firmware must stop ongoing setup actions and wait for a new
Setup packet.
Logic 1 indicates that the buffer contains a Setup packet.
This bit indicates which buffer is currently selected for CPU
access (0 = primary buffer, 1 = secondary buffer).
reserved
2
1
SETUPT
CPUBUF
0
-
Table 29:
Bit
Endpoint Status Image register: bit description
…continued
Symbol
Description
Table 30:
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
DMA Function and Scratch register: bit allocation
15
14
DMAEN
reserved
0
0
R/W
R/W
7
6
13
12
11
10
9
8
SFIRH[4:0]
0
R/W
2
0
0
0
0
0
R/W
5
R/W
4
R/W
3
R/W
1
R/W
0
SFIRL[7:0]
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1183BS,118 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,151 | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BS,157 | 功能描述:USB 接口集成電路 DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
| ISP1183BSFA | 功能描述:IC USB HOST CTRL LOW-SPD 32HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應商設備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| ISP1183BS-S | 功能描述:USB 接口集成電路 FULL-SPD USB2 DEVICE RoHS:否 制造商:Cypress Semiconductor 產品:USB 2.0 數據速率: 接口類型:SPI 工作電源電壓:3.15 V to 3.45 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:WLCSP-20 |
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