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參數資料
| 型號： | MPC823UM_REV1_16-CPM7 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 10 AMP SUBMINIATURE POWER RELAY |
| 中文描述： | 通信處理器模塊 |
| 文件頁數： | 3/74頁 |
| 文件大小： | 234K |
| 代理商： | MPC823UM_REV1_16-CPM7 |
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Communication Processor Module
MOTOROLA
MPC823 REFERENCE MANUAL
16-381
S
C
1
P
If the serial management controllers are connected to the TDM, it gets its synchronization
pulse from the time-slot assigner. Otherwise, if a serial management controller is connected
to the NMSI and the Transparent protocol is selected, the serial management controller can
use the SMSYNx pin as a synchronization pin to determine when it must start transmitting
and receiving. The SMSYNx pin is not used, however, when a serial communication
controller is in UART mode.
16.11.1 Features
The following is a list of the serial management controllers’ main features:
Each serial management controller can implement the UART protocol on its own pins
Each serial management controller can implement a totally Transparent protocol on a
multiplexed or nonmultiplexed line. If SMC2 uses a nonmultiplexed line, the serial
interface time-slot assigner is not available.
Each SMCx channel fully supports the circuit interface and monitor channels of the GCI
(IOM-2) in ISDN applications
Two serial management controllers support the two sets of circuit interface and monitor
channels in the SCIT channels 0 and 1
Full-duplex operation
Local loopback and echo capability for testing
16.11.2 General SMCx Mode Register
The operating mode of each serial management controller port is defined by the 16-bit,
memory-mapped, read/write general SMCx mode register (SMCMR). Refer to each specific
SMCx protocol section for information about this register and Table 16-2 (page 16-11) for
specific commands.
16.11.3 SMCx Buffer Descriptor Operation
When the serial management controllers are configured to operate in GCI mode, their
memory structure is predefined as one half-word long for transmit and one half-word long
for receive. For more information on these half-word structures, refer to
Section 16.11.8 The SMCx in GCI Mode
.
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