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參數資料
| 型號： | MPC9600 |
| 廠商： | Motorola, Inc. |
| 英文描述： | LOW VOLTAGE 2.5 V AND 3.3 V CMOS PLL CLOCK DRIVER |
| 中文描述： | 低電壓2.5 V和3.3 V的CMOS PLL時鐘驅動器 |
| 文件頁數： | 4/16頁 |
| 文件大小： | 321K |
| 代理商： | MPC9600 |
MOTOROLA
TIMING SOLUTIONS
FUNCTION TABLE (CONTROLS)
Control Pin
REF_SEL
VCCA
OE
FSELA
FSELB
FSELC
FSEL_FB
1..VCCA = GND, PLL off and bypassed for static test and diagnosis
Table 1: ABSOLUTE MAXIMUM RATINGS*
0
1
CCLK
PCLK
PLL Power
PLL Bypass1
Outputs Enabled
Output Bank A at VCO/2
Output Bank B at VCO/2
Output Bank C at VCO/2
Feedback Output at VCO/8
Outputs Disabled (except QFB)
Output Bank A at VCO/4
Output Bank B at VCO/4
Output Bank C at VCO/4
Feedback Output at VCO/12
Symbol
Parameter
Min
Max
Unit
VCC
VIN
VOUT
IIN
IOUT
TStor
* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or
conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is
not implied.
Supply Voltage
–0.3
4.6
V
DC Input Voltage
–0.3
VCC + 0.3
VCC + 0.3
±
20
V
DC Output Voltage
–0.3
V
DC Input Current
mA
DC Output Current
±
50
mA
Storage Temperature Range
–40
125
°
C
Table 2: GENERAL SPECIFICATIONS
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VTT
MM
Output Termination Voltage
VCC
2
V
ESD Protection (Machine Model)
400
V
HBM
ESD Protection (Human Body Model)
4000
V
CDM
ESD Protection (Charged Device Model)
1500
V
LU
Latch–Up Immunity
200
mA
CPD
CIN
Power Dissipation Capacitance
10
pF
Per output
Input Capacitance
4.0
pF
Inputs
Table 3: DC CHARACTERISTICS
(VCC = 3.3 V
±
5%, TA = –40
°
to +85
°
C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
VIL
VPP
VCMRa
VOH
VOL
Input High Voltage
2.0
VCC + 0.3
0.8
V
LVCMOS
Input Low Voltage
V
LVCMOS
Peak-to-peak Input Voltage (DC)
PCLK, PCLK
250
mV
LVPECL
Common Mode Range (DC)
PCLK, PCLK
1.0
VCC-0.6
V
LVPECL
IOH=-24 mAb
IOL= 24mA
IOL= 12mA
Output High Voltage
2.4
V
Output Low Voltage
0.55
0.30
V
V
ZOUT
IIN
ICCA
ICCQ
a. VCMR (DC) is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within the VCMR range
and the input swing lies within the VPP (DC) specification.
b. The MPC9600 is capable of driving 50
transmission lines on the incident edge. Each output drives one 50
parallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50
series terminated transmission lines.
Output Impedance
14 – 17
Input Leakage Current
±
150
μ
A
VIN = VCC or GND
VCCA Pin
All VCC Pins
Maximum PLL Supply Current
2.0
5.0
mA
Maximum Quiescent Supply Current
1.0
mA
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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| MPC9600FA | 功能描述:IC CLOCK DRVR PLL LV 1:21 48LQFP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數:1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| MPC9608 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:1:10 LVCMOS Zero Delay Clock Buffer |
| MPC9608AC | 功能描述:時鐘緩沖器 RoHS:否 制造商:Texas Instruments 輸出端數量:5 最大輸入頻率:40 MHz 傳播延遲（最大值）: 電源電壓-最大:3.45 V 電源電壓-最小:2.375 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LLP-24 封裝:Reel |
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