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參數資料
| 型號： | MPC9600 |
| 廠商： | Motorola, Inc. |
| 英文描述： | LOW VOLTAGE 2.5 V AND 3.3 V CMOS PLL CLOCK DRIVER |
| 中文描述： | 低電壓2.5 V和3.3 V的CMOS PLL時鐘驅動器 |
| 文件頁數： | 8/16頁 |
| 文件大小： | 321K |
| 代理商： | MPC9600 |
MOTOROLA
TIMING SOLUTIONS
Figure 3. Configuration for 125 MHz clocks
Figure 4. Configuration for 133.3/66.67 MHz clocks
MPC9600
fref = 20.833 MHz
125 MHz
125 MHz
20.833 MHz (Feedback)
125 MHz
Frequency range
Min
Max
Input
16.67 MHz
33.33 MHz
QA outputs
100 MHz
200 MHz
QB outputs
QC outputs
100 MHz
100 MHz
200 MHz
200 MHz
Frequency range
Min
Max
Input
25 MHz
50 MHz
QA outputs
100 MHz
200 MHz
QB outputs
QC outputs
100 MHz
100 MHz
200 MHz
200 MHz
CCLK
FB_IN
FSEL_FB
FSELA
FSELB
FSELC
QA0–6
QB0–6
QC0–6
QFB
7
7
7
1
0
0
0
MPC9600
fref = 33.33 MHz
133.3 MHz
66.67 MHz
33.33 MHz (Feedback)
66.67 MHz
CCLK
FB_IN
FSEL_FB
FSELA
FSELB
FSELC
QA0–6
QB0–6
QC0–6
QFB
7
7
7
0
0
1
1
Power Supply Filtering
The MPC9600 is a mixed analog/digital product. Its analog
circuitry is naturally susceptible to random noise, especially if
this noise is seen on the power supply pins. Random noise
on the VCCA (PLL) power supply impacts the device
characteristics, for instance I/O jitter. The MPC9600 provides
separate power supplies for the output buffers (VCC) and the
phase-locked loop (VCCA) of the device.The purpose of this
design technique is to isolate the high switching noise digital
outputs from the relatively sensitive internal analog
phase-locked loop. In a digital system environment where it
is more difficult to minimize noise on the power supplies a
second level of isolation may be required. The simple but
effective form of isolation is a power supply filter on the VCCA
pin for the MPC9600. Figure 5. illustrates a typical power
supply filter scheme. The MPC9600 frequency and phase
stability is most susceptible to noise with spectral content in
the 100kHz to 20MHz range. Therefore the filter should be
designed to target this range. The key parameter that needs
to be met in the final filter design is the DC voltage drop
across the series filter resistor RF. From the data sheet the
ICCA current (the current sourced through the VCCA pin) is
typically 3 mA (5 mA maximum), assuming that a minimum of
2.325 V (VCC=3.3 V or VCC=2.5 V) must be maintained on
the VCCA pin. The resistor RF shown in Figure 5. “VCCA
Power Supply Filter” must have a resistance of 9-10
(VCC=2.5 V) to meet the voltage drop criteria.
The minimum values for RF and the filter capacitor CF are
defined by the required filter characteristics: the RC filter
should provide an attenuation greater than 40 dB for noise
whose spectral content is above 100 kHz. In the example RC
filter shown in Figure 5. “VCCA Power Supply Filter”, the filter
cut-off frequency is around 3-5 kHz and the noise attenuation
at 100 kHz is better than 42 dB.
Figure 5. VCCA Power Supply Filter
As the noise frequency crosses the series resonant point
of an individual capacitor its overall impedance begins to look
inductive and thus increases with increasing frequency. The
parallel capacitor combination shown ensures that a low
impedance path to ground exists for frequencies well above
the bandwidth of the PLL. Although the MPC9600 has
several design features to minimize the susceptibility to
power supply noise (isolated power and grounds and fully
differential PLL) there still may be applications in which
overall performance is being degraded due to system power
supply noise. The power supply filter schemes discussed in
this section should be adequate to eliminate power supply
noise related problems in most designs.
VCCA
VCC
MPC9600
10 nF
RF = 9–10
for VCC = 2.5 V or VCC = 3.3 V
CF = 22
μ
F for VCC = 2.5 V or VCC = 3.3 V
CF
33...100 nF
RF
VCC
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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