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參數資料
型號: THS8083APZPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝: GREEN, PLASTIC, HTQFP-100
文件頁數: 25/63頁
文件大小: 320K
代理商: THS8083APZPG4
318
CLP2_EN: Enables/disables clamping on channel 2
1: enable (default)
0: disable
CLP2_RG: Sets the clamp range for channel 2
1: middle range
0: bottom range (default)
CLP3_EN: Enables/disables clamping on channel 3
1: enable (default)
0: disable
CLP3_RG: Sets the clamp range for channel 3
1: middle range
0: bottom range (default)
3.11.28 Register Name: CLP_START_0
Subaddress: 21 (R/W)
MSB
LSB
CLP_START7
CLP_START6
CLP_START5
CLP_START4
CLP_START3
CLP_START2
CLP_START1
CLP_START0
CLP_START[7..0]:
CLP_START[11..0] sets the pixel count value that defines the start of the internal clamping pulse. If external
clamping is selected (via CLPSEL) this value has no meaning.
Default: 0x2
3.11.29 Register Name: CLP_START_1
Subaddress: 22 (R/W)
MSB
LSB
X
CLP_START10 CLP_START9
CLP_START8
CLP_START11
CLP_START[11..8]:
See register CLP_START_0
Default: 0x00
3.11.30 Register Name: CLP_STOP_0
Subaddress: 23 (R/W)
MSB
LSB
CLP_STOP7
CLP_STOP6
CLP_STOP5
CLP_STOP4
CLP_STOP3
CLP_STOP2
CLP_STOP1
CLP_STOP0
CLP_STOP[7..0]:
CLP_STOP[11..0] sets the pixel count value that defines the end of the internal clamping pulse. If external
clamping is selected (via CLPSEL) this value has no meaning.
Default: 0x40 = 64
3.11.31 Register Name: CLP_STOP_1
Subaddress: 24 (R/W)
MSB
LSB
X
CLP_STOP11
CLP_STOP10
CLP_STOP9
CLP_STOP8
CLP_STOP[11..8]:
See register CLP_STOP_0
Default: 0x00
NOTE: A setting of about 62 clamp clock cycles is sufficient to assure enough clamp timing (>500 ns) at worst case
(=highest clock frequency).
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