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參數(shù)資料
| 型號： | TSB12LV01APZ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | High-Speed Serial-Bus Link-Layer Controller |
| 中文描述： | 高速串行總線鏈路層控制器 |
| 文件頁數(shù)： | 32/71頁 |
| 文件大小： | 267K |
| 代理商： | TSB12LV01APZ |
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3–14
3.3.2
The procedure to access to the ATF is as follows:
ATF Access
1.
2.
Write the first quadlet of the packet to ATF location 80h: the data is not confirmed for transmission.
Write the second to n–1 quadlets of the packet to ATF location 84h: Can use burst write to write
(n–2) quadlets into ATF, which requires only one host write transaction, the data is not confirmed
for transmission.
Write the final quadlet of the packet to ATF location 8Ch: The data is confirmed for transmission.
This location supports burst write.
3.
If the first quadlet of a packet is not written to the ATF_First address, the transmitter enters a state
denoted by an ATBadF interrupt. An underflow of the ATF also causes an ATBadF interrupt.
When this state is entered, no asynchronous packets can be sent until the ATF is cleared via the
CLR ATF control bit. Isochronous packets can be sent while in this state. For example, if an
asynchronous write request packet is addressed to a nonexistent address, the TSB12LV01A
waits until a time out occurs and then sets ATAck (in the node address register) to 1_0000b. After
the asynchronous command is sent, the sender reads ATAck. If ATAck = 1_0000b, then a time out
has occurred (i.e., no response from any node was received).
ATF access example:
The first quadlet of n quadlets is written to ATF location 80h. Quadlets (2 to n–1) are written to ATF
location 84h. The last quadlet (nth) is written to ATF location 8Ch. If the ATFEmpty bit is true, it is
set to false and the TSB12LV01A requests the phy layer to arbitrate for the bus. To ensure that an
ATF underflow condition does not occur, loading of the ATF in this manner is suggested.
After loading the ATF with an asynchronous packet and sending it, the software driver needs to
wait until the TxRdy bit (bit 5) of the Interrupt register is set to 1 before reading ATAck. When
TxRdy is set to 1, this indicates that the transmitter has received an ACK or time out. So the
correct ATAck can then be read from the node address register. In order to receive the next Ack
code, the TxRdy bit needs to be cleared to 0.
Writing to 80h (ATF_First) causes DATA0–DATA31 to be written into the ATF and sets the control bit to 1
to indicate the first quadlet of the packet, but the data is not confirmed for transmission.
It is allowed to burst write to 84h(ATF_Continue), which allows multiple quadlets to load into ATF, but the
data is not confirmed for transmission.
It is allowed to burst write to 8Ch (ATF_Continue & Update), which allows multiple quadlets to load into ATF,
and the data is confirmed for transmission. If consecutive writes to ATF_Continue & Update do not keep
up with data being put on the 1394 bus, an ITF underflow error will occur.
Write to address A0h (ATF burst write) writes the whole packet into ATF. The first quadlet written into ATF
has the control bit set to 1 to indicate this is the first quadlet of the packet, and the rest of the quadlets have
the control bit set to 0. The last quadlet written into ATF confirms the packet for transmission.
To do burst write host bus master continuously drive CSZ low, TSB12LV01A loads DATA0–DATA31 to ATF
during each rising edge of BCLK when CSZ is low and at the same time it asserts CAZ and CAZ is one cycle
behind CSZ. The control bit is 0 for ATF_Continue and ATF_Continue & Update.
ATF access example:
Assume there are n quadlets need to write to ATF for transmission.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TSB12LV01B | 制造商:TI 制造商全稱:Texas Instruments 功能描述:IEEE 1394-1995 HIGH SPEED SERIAL BUS LINK LAYER CONTROLLER |
| TSB12LV01B-EP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Military Enhanced Plastic High Performance 1394 3.3V Link Layer for Telecom. Embedded & Indust. App. |
| TSB12LV01BIPZT | 功能描述:1394 接口集成電路 High Perf 1394 3.3V Link Layer RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV01BIPZTEP | 功能描述:1394 接口集成電路 Mil Enh Hi Perf 1394 3.3V Link Layer RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
| TSB12LV01BPZ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:BUS CONTROLLER |
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