- 您現在的位置：買賣IC網 > PDF目錄373969 > AD9862 (Analog Devices, Inc.) Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications PDF資料下載
參數資料
| 型號： | AD9862 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| 中文描述： | 混合寬帶通信信號前端（MxFE⑩）處理器 |
| 文件頁數： | 21/32頁 |
| 文件大小： | 617K |
| 代理商： | AD9862 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
REV. 0
AD9860/AD9862
–21–
In most systems, the DAC (and each up-converter stage) requires
analog filtering to meet spectral mask and out-of-band spurious
emissions requirements. Digital interpolation (Block C) and
Hilbert filtering (Block E) can be used to relax some of the system
analog filtering.
Digital 2 interpolation with input data rates of up to 64 MSPS or
4 interpolation with input data rates of 32 MSPS is available
in this mode (or interpolation filters can be bypassed to achieve
a 128 MSPS input data rate). The data bandwidth with 2 or
4 interpolation enabled is up to 38% of the input data rate. If
no interpolation is enabled, the data bandwidth will be the full
Nyquist band with Sinc limitations. The interpolation filters
are configured through the Interpolation Serial register.
The Hilbert filter can be enabled in this mode to suppress the
positive or negative image that naturally occurs with real data.
The single sideband signal when combined with a quadrature
modulator can upconvert the desired signal and suppressed image,
forming a Hartley Image Rejection Architecture (both Tx paths
need to be enabled to produce the Image Rejection Architecture).
The Hilbert filter will provide over 50 dB image suppression for
signals between 12.5% to 38% of the input data rate. The Hil-
bert filter can be enabled and configured using the Hilbert and
Keep
–
ve Serial registers.
Digital frequency tuning the Tx output is also possible in this
mode using the coarse modulation block. The coarse modulation
block can be used to frequency shift the Tx signal either
–
f
DAC
/4,
–
f
DAC
/8, +f
DAC
/8 or +f
DAC
/4. The coarse modulator does not
require the Hilbert filter to be enabled, in which case the real
signal and image will shift. If the Hilbert filter is enabled, a
complex mix can be performed on the single sideband signal by
the coarse modulator (Note: the Hilbert filter does not need to
be enabled if single sideband data is provided externally).
The fine modulator can be used to accurately place the output
signal shifting the Tx data spectrum in the positive or negative
direction with a resolution of f
DAC
/2
26
. The fine modulator
requires both 4 interpolation and the Hilbert filter enabled to
be used in this mode. The coarse modulator and fine modulator
can both be used and provide a tuning range between
±
68% of
the DAC Nyquist frequency.
If all Tx DSP blocks are bypassed, the AD9860/AD9862 oper-
ates similar to a standard TxDAC. In Single Channel DAC Data
mode, only the Channel A DAC is used; Channel B is powered
down to reduce power consumption.
Two Independent Real Signal DAC Data
The Dual Channel Real DAC Data mode is used to transmit
diversity or dual channel signals. In this mode, 12-/14-bit, dual
channel, interleaved Tx data is provided to the AD9860/AD9862
and latched using either CLKOUT1 or CLKOUT2 edges as
defined in the Clock Overview section of the data sheet. Both
Tx paths are enabled and the two signals will be processed
independently. The Tx digital processing blocks available in this
mode are the Interpolation Filters (Block C) and the Coarse
Modulator (Block D).
As mentioned previously, the interpolation filters can be used to
relax requirements on the external analog filters. The maximum
rate of the Tx interface is 128 MSPS, i.e., 64 MSPS/channel
with interleaved data. Therefore to fully take advantage of the
DACs maximum update rate of 128 MSPS, 2 interpolation is
required. The 4 interpolation filter is recommended for input
data rates equal to or less than 32 MSPS/channel (64 MSPS
interleaved). The data bandwidth with 2 or 4 interpolation
enabled is up to 37.5% of the channel input data rate. If no
interpolation is enabled, the data bandwidth will be the full
Nyquist band with Sinc limitations. The interpolation filters
are configured through the Interpolation Serial register.
The coarse modulation will perform a real mix of each channel,
independently, with either f
DAC
/4 or f
DAC
/8.
Dual Channel Complex DAC Data
The Dual Channel Complex DAC Data (also known as Single
Sideband Data) is used to generate complex Tx signals (i.e., I and
Q). In this mode, 12-/14-bit, interleaved I and Q data is provided
to the AD9860/AD9862 and latched using either CLKOUT1 or
CLKOUT2 edges as defined in the Clock Overview section of
the data sheet. Both Tx paths are enabled and the two signals
will be processed as a complex waveform. The Tx digital pro-
cessing blocks available in this mode are the Fine Modulator
(Block B), the Interpolation Filters (Block C), and the Coarse
Modulator (Block D).
As mentioned previously, the interpolation filters can be used to
relax requirements on the external analog filters. The maximum
rate of the Tx interface is 128 MSPS, i.e., 64 MSPS/channel with
interleaved data (as is the case in this mode). Therefore, to fully
take advantage of the DAC
’
s maximum update rate of 128 MSPS,
2 interpolation is required. The 4 interpolation is recommended
for input data rates equal to or less than 32 MSPS/channel
(64 MSPS interleaved). The data bandwidth with 2 or 4
interpolation enabled is up to 37.5% of the channel input data
rate. If no interpolation is enabled, the data bandwidth will be
the full Nyquist band with Sinc limitations. The interpolation
filters are configured through the Interpolation Serial register.
A complex mix can be performed on the single sideband signal
by the coarse and/or fine modulator. The coarse modulation
block can be used to frequency shift the Tx signal either
–
f
DAC
/4,
–
f
DAC
/8, +f
DAC
/8 or + f
DAC
/4. The fine modulator can be used to
accurately place the output signal shifting the Tx data spectrum
in the positive or negative direction with a resolution of 1/2
26
of
the DAC update rate. The fine modulator requires 4
interpola-
tion to be enabled. The coarse modulator and fine modulator
can both be used and provide a tuning range between
±
70% of
the DAC Nyquist frequency.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9862BST | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| AD9864 | IF Digitizing Subsystem |
| AD9864-EB | IF Digitizing Subsystem |
| AD9864BCPZ | IF Digitizing Subsystem |
| AD9864BCPZRL | IF Digitizing Subsystem |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9862BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:12B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9862BSTRL | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:12B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9862BSTZ | 功能描述:IC FRONT-END MIXED-SGNL 128-LQFP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9862BSTZRL | 功能描述:IC PROCESSOR FRONT END 128LQFP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9862-EB | 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:MIXED SIGNAL FRONT END - Bulk |
發布緊急采購，3分鐘左右您將得到回復。