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參數(shù)資料
| 型號： | AD9862 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| 中文描述： | 混合寬帶通信信號前端（MxFE⑩）處理器 |
| 文件頁數(shù)： | 3/32頁 |
| 文件大小： | 617K |
| 代理商： | AD9862 |
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REV. 0
AD9860/AD9862
–3–
Test
Level
AD9860/AD9862
Typ
Rx PARAMETERS (continued)
Temp
Min
Max
Unit
DC ACCURACY
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Gain Error
Aperture Delay
Aperture Uncertainty (Jitter)
Input Referred Noise
Reference Voltage Error
REFT-REFB Error (1 V)
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
III
III
III
III
III
III
III
±
0.3/
±
0.4
±
1.2/
±
5
±
0.1
±
0.2
2.0
1.2
250
LSB
LSB
%FSR
%FSR
ns
ps rms
μ
V
25
o
C
I
±
1
±
4
mV
AD9860 DYNAMIC PERFORMANCE (A
IN
=
–
0.5 dBFS, f = 5 MHz)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
25
∞
C
25
∞
C
25
∞
C
25
∞
C
I
I
I
I
59.0
56.0
60.66
58.0
–
76.5
81.0
dBc
dBc
dBc
dBc
–
70.5
70.3
AD9862 DYNAMIC PERFORMANCE (A
IN
=
–
0.5 dBFS, f = 5 MHz)
Signal-to-Noise Ratio
Signal-to-Noise and Distortion Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
25
∞
C
25
∞
C
25
∞
C
25
∞
C
I
I
I
I
62.6
62.5
64.2
64.14
–
79.22
85.13
dBc
dBc
dBc
dBc
–
73.2
77.09
CHANNEL-TO-CHANNEL ISOLATION
Tx-to-Rx (A
OUT
= 0 dBFS, f
OUT
= 7 MHz)
Rx Channel Crosstalk (f
1
= 6 MHz, f
2
= 9 MHz)
25
o
C
25
o
C
III
III
>90
>80
dB
dB
PARAMETERS
CMOS LOGIC INPUTS
Logic
“
1
”
Voltage, V
IH
Logic
“
0
”
Voltage, V
IL
Logic
“
1
”
Current
Logic
“
0
”
Current
Input Capacitance
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
II
II
II
II
III
DRVDD
–
0.7
V
V
μ
A
μ
A
pF
0.4
12
12
3
CMOS LOGIC OUTPUTS (1 mA Load)
Logic
“
1
”
Voltage, V
OH
Logic
“
0
”
Voltage, V
OL
25
o
C
25
o
C
II
II
DRVDD
–
0.6
V
V
0.4
POWER SUPPLY
Analog Supply Currents
Tx (Both Channels, 20 mA FS Output)
Tx Powered Down
Rx (Both Channels, Input Buffer Enabled)
Rx (Both Channels, Input Buffer Disabled)
Rx (32 MSPS, Low Power Mode, Buffer Disabled)
Rx (16 MSPS, Low Power Mode, Buffer Disabled)
Rx Path Powered Down
DLL
Digital Supply Current
AD9860 Both Rx and Tx Path (All Channels Enabled)
2 Interpolation, f
DAC
= f
ADC
= 64 MSPS
AD9862 Both Rx and Tx Path (All Channels Enabled)
2 Interpolation, f
DAC
= f
ADC
= 64 MSPS
Tx Path (f
DAC
= 128 MSPS)
Processing Blocks Disabled
4 Interpolation
4 Interpolation, Coarse Modulation
4 Interpolation, Fine Modulation
4 Interpolation, Coarse and Fine Modulation
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
I
I
I
III
III
III
I
III
70
2.5
275
245
155
80
5.0
12
76
5.0
307
mA
mA
mA
mA
mA
mA
mA
mA
6.0
25
o
C
I
92
112
mA
25
o
C
I
104
124
mA
25
o
C
25
o
C
25
o
C
25
o
C
25
o
C
III
III
III
III
III
45
90
110
110
130
mA
mA
mA
mA
mA
相關PDF資料 |
PDF描述 |
|---|---|
| AD9862BST | Mixed-Signal Front-End (MxFE⑩) Processor for Broadband Communications |
| AD9864 | IF Digitizing Subsystem |
| AD9864-EB | IF Digitizing Subsystem |
| AD9864BCPZ | IF Digitizing Subsystem |
| AD9864BCPZRL | IF Digitizing Subsystem |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD9862BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:12B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9862BSTRL | 制造商:Analog Devices 功能描述:Mixed Signal Front End 128-Pin LQFP T/R 制造商:Rochester Electronics LLC 功能描述:12B MIXED SIGNAL FRONT END MXFE PROCESSO - Tape and Reel |
| AD9862BSTZ | 功能描述:IC FRONT-END MIXED-SGNL 128-LQFP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9862BSTZRL | 功能描述:IC PROCESSOR FRONT END 128LQFP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9862-EB | 制造商:Analog Devices 功能描述: 制造商:Analog Devices 功能描述:MIXED SIGNAL FRONT END - Bulk |
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