欧美成人免费电影,国产欧美一区二区三区精品酒店,精品国产a毛片,色网在线免费观看

參數資料
型號: AD9864BCPZRL
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: IF Digitizing Subsystem
中文描述: SPECIALTY CONSUMER CIRCUIT, QCC48
封裝: LEAD FREE, MO-220VKKD-2, LFCSP-48
文件頁數: 35/44頁
文件大小: 1984K
代理商: AD9864BCPZRL
AD9864
data is used, the effective system NF will increase because of the
quantization noise present in the 16-bit data after truncation.
APPLICATIONS CONSIDERATIONS
Frequency Planning
The LO frequency (and/or ADC clock frequency) must be chosen
carefully to prevent known internally generated spurs from mixing
down along with the desired signal, thus degrading the SNR per-
formance. The major sources of spurs in the AD9864 are the ADC
clock and digital circuitry operating at 1/3 of f
CLK
. Thus, the clock
frequency (f
CLK
) is the most important variable in determining
which LO (and therefore IF) frequencies are viable.
3
6
0
15
14
12
13
11
10
9
8
N
9
1
VGA ATTENUATION (dB)
2
SNR = 90.1dBFS
BW = 50kHz
BW = 150kHz
SNR = 82.9dBFS
BW = 10kHz
SNR = 95.1dBFS
SNR = 103.2dB
0
Many applications have frequency plans that take advantage of
industry-standard IF frequencies due to the large selection of
low cost crystal or SAW filters. If the selected IF frequency and
ADC clock rate result in a problematic spurious component, an
alternative ADC clock rate should be selected by slightly modi-
fying the decimation factor and CLK synthesizer settings (if
used) such that the output sample rate remains the same. Also,
applications requiring a certain degree of tuning range should
take into consideration the location and magnitude of these
spurs when determining the tuning range as well as optimum
IF and ADC clock frequency.
Figure 64. Nominal System Noise Figure and Peak SNR vs. AGCG Setting (f
IF
=
73.35 MHz, f
CLK
= 18 MSPS, and 24-bit I/Q Data)
Figure 65 plots the nominal system NF with 16-bit output data
as a function of AGC in both narrow-band and wideband
mode. In wideband mode, the NF curve is virtually unchanged
relative to the 24-bit output data because the output SNR before
truncation is always less than the 96 dB SNR that 16-bit data
can support. However, in narrow-band mode, where the output
SNR approaches or exceeds the SNR that can be supported with
16-bit data, the degradation in system NF is more severe. Fur-
thermore, if the signal processing within the DSP adds noise at
the level of an LSB, the system noise figure can be degraded
even more than Figure 65 shows. For example, this could occur
in a fixed 16-bit DSP whose code is not optimized to process
the AD9864’s 16-bit data with minimal quantization effects. To
limit the quantization effects within the AD9864, the 24-bit
data undergoes noise shaping just prior to 16-bit truncation,
thus reducing the in-band quantization noise by 5 dB (with 2×
oversampling). This explains why 98.8 dBFS SNR performance
is still achievable with 16-bit data in a 10 kHz BW.
Figure 66 plots the measured in-band noise power as a function
of the LO frequency for f
CLK
= 18 MHz and an output signal
bandwidth of 150 kHz when no signal is present. Any LO
frequency resulting in large spurs should be avoided. As this
figure shows, large spurs result when the LO is
f
CLK
/8 = 2.25
MHz away from a harmonic of 18 MHz , i.e.,
n f
CLK
±
f
CLK
/8.
Also problematic are LO frequencies whose odd order harmon-
ics, i.e.,
m f
LO
, mix with harmonics of
f
CLK
to
f
CLK
/8. This spur
mechanism is a result of the mixer being internally driven
by a squared-up version of the LO input consisting of the LO
frequency and its odd order harmonics. These spur frequencies
can be calculated from the relation
(
)
CLK
LO
f
n
f
m
×
±
=
×
8
/
(12)
where
m =
1, 3, 5... and
n =
1, 2, 3...
N
15
8
14
13
12
11
10
9
SNR = 98.8dBFS
BW = 50kHz
BW = 150kHz
SNR = 83dBFS
SNR = 94.1dBFS
BW = 10kHz
SNR = 89.9dBFS
16
17
3
6
0
9
12
VGA ATTENUATION (dB)
0
A second source of spurs is a large block of digital circuitry that
is clocked at
f
CLK
/3. Problematic LO frequencies associated with
this spur source are given by
8
/
3
CLK
CLK
CLK
LO
f
f
n
f
f
±
×
+
=
(13)
where
n =
1, 2, 3...
Figure 67 shows that omitting the LO frequencies given by
Equation 12 for
m
= 1, 3, and 5 and by Equation 13 accounts
for most of the spurs. Some of the remaining low level spurs
can be attributed to coupling from the SSI digital output. As a
result, users are also advised to optimize the output bit rate
(
f
CLKOUT
via the SSIORD register) and the digital output driver
strength to achieve the lowest spurious and noise figure per-
formance for a particular LO frequency and
f
CLK
setting. This is
especially the case for particularly narrow-band channels in
Figure 65. Nominal System Noise Figure and Peak SNR vs. AGCG
Setting (f
IF
= 73.35 MHz, f
CLK
= 18 MSPS, and 16-bit I/Q Data)
Rev. 0 | Page 35 of 44
相關PDF資料
PDF描述
AD9866BCPRL Broadband Modem Mixed Signal Front End
AD9866CHIPS Broadband Modem Mixed Signal Front End
AD9866 Broadband Modem Mixed Signal Front End
AD9866-EB Broadband Modem Mixed Signal Front End
AD9866BCP Broadband Modem Mixed Signal Front End
相關代理商/技術參數
參數描述
AD9864-EB 制造商:Analog Devices 功能描述:
AD9864-EBZ 功能描述:BOARD EVAL FOR AD9864 制造商:analog devices inc. 系列:- 零件狀態:有效 類型:數字轉換器 頻率:10MHz ~ 300MHz 配套使用產品/相關產品:AD9864 所含物品:板 標準包裝:1
AD9865 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End
AD9865BCP 制造商:Analog Devices 功能描述:Mixed Signal Front End 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:MIXED SGNL FRONT END 64LFCSP EP - Trays 制造商:Analog Devices 功能描述:10BIT MIXED SIGNAL CONVERTER 9865
AD9865BCPRL 制造商:Analog Devices 功能描述:Mixed Signal Front End 64-Pin LFCSP EP T/R
主站蜘蛛池模板: 麻栗坡县| 青田县| 札达县| 浦江县| 调兵山市| 土默特左旗| 文登市| 香港| 明溪县| 灵宝市| 宜兰市| 嫩江县| 卢龙县| 平果县| 揭阳市| 颍上县| 广南县| 绩溪县| 娱乐| 汤阴县| 江城| 万源市| 东台市| 泾川县| 长丰县| 河曲县| 北海市| 布拖县| 德惠市| 丹江口市| 微博| 武冈市| 庆城县| 蓬安县| 商南县| 平定县| 浦北县| 嘉祥县| 普定县| 资溪县| 杭州市|