
1-9
1—HARDWARE
ISD-SR3000
ISD
Table 1-4: Typical Supported CODEC Devices
Channel Width
The CODEC interface supports both 8-bit and 16-bit channel width in Master and Slave modes.
Figure 1 shows how the CODEC interface signals behave when short frame protocol is config-
ured.
Slave Mode
The ISD-SR3000 supports digital telephony applications including DECT and ISDN by provid-
ing a Slave mode of operation. In Slave mode operation, the CCLK signal is input to the SR-
3000 and controls the frequency of the CODEC interface operation. The CCLK may be any fre-
quency between 500kHz and 4MHz. Both long and short frame protocols are supported with
only the CFS1 output signal width affected. The CFSO input signal must be a minimum of one
CCLK cycle.
In slave mode, a double clock bit rate feature is available as well. When the CODEC interface
is configured to double clock bit rate, the CCLK input signal is divided internally by two and the
resulting clock used to control the frequency of the CODEC interface operation.
Manufacturer
CODEC Device
Name
Characteristics
Operating
Voltage
Conversion Type
National
Semiconductor
TP3054
Single CODEC
5V
μ-Law
OKI
MSM7533V
Dual CODEC
5V
μ-Law, A-Law
Macronix
MX93002FC
Dual rail CODEC
5V
μ-Law
Lucent
T7503
Dual CODEC
5V
μ-Law
Motorola
MC145481
Single CODEC
3V
μ-Law
Table 1-5: Typical CODEC Applications
Application
CODEC
Type
No. of
Channels
Master/
Slave
Channel
Width
(No.Bits)
Long/
Short
Frame
Protocol
Bit Rate
CCLK Freq.
(MHz)
Sample
Rate (Hz)
No. of
Frame
Syncs
Analog
μ-Law
single
1
Master
8
short or
long
1
2.048
8000
1
Linear
single
1
Master
16
short
1
2.048
8000
1