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參數資料
型號： MC68HC11A8MCFN2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52
封裝： PLASTIC, LCC-52
文件頁數： 116/158頁
文件大小： 776K
代理商： MC68HC11A8MCFN2
MOTOROLA
10-18
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MC68HC11A8
TECHNICAL DATA
10
Table 10-5 Cycle-by-Cycle Operation — Extended Mode (Sheet 1 of 2)
Reference
Number*
5-1
Address Mode
and Instructions
JMP
Cycles Cycle
#
1
2
3
1
2
3
4
Address Bus
R/W
Line
1
1
1
1
1
1
1
Data Bus
3
Opcode Address
Opcode Address + 1
Opcode Address + 2
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Opcode ($7E)
Jump Address (High Byte)
Jump Address (Low Byte)
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data
5-2
ADCA, ADCB, ADDA,
ADDB, ANDA, ANDB,
BITA, BITB, CMPA,
CMPB, EORA, EORB,
LDAA, LDAB, ORAA
ORAB, SBCA, SBCB,
SUBA, SUBB
STAA, STAB
4
5-3
4
1
2
3
4
1
2
3
4
5
1
2
3
4
5
1
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
Opcode Address
1
1
1
0
1
1
1
1
1
1
1
1
0
0
1
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Accumulator Data
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Register Data (High Byte)
Register Data (Low Byte)
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($FE)
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($FF)
Operand Address (High Byte)
Operand Address (Low Byte)
Register Data (High Byte)
Register Data (Low Byte)
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Original Operand Data
Irrelevant Data
Result Operand Data
Opcode ($7D)
Operand Address (High Byte)
Operand Address (Low Byte)
Original Operand Data
Irrelevant Data
Irrelevant Data
Opcode
Operand Address (High Byte)
Operand Address (Low Byte)
Operand Data (High Byte)
Operand Data (Low Byte)
Irrelevant Data
5-4
LDD, LDS, LDX
5
5-5
STD, STS, STX
5
5-6
LDY
6
2
3
4
5
6
1
Opcode Address + 1
Opcode Address + 2
Opcode Address + 3
Operand Address
Operand Address + 1
Opcode Address
1
1
1
1
1
1
5-7
STY
6
2
3
4
5
6
1
2
3
4
5
6
1
2
3
4
5
6
1
2
3
4
5
6
Opcode Address + 1
Opcode Address + 2
Opcode Address + 3
Operand Address
Operand Address + 1
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
$FFFF
Operand Address
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
$FFFF
$FFFF
Opcode Address
Opcode Address + 1
Opcode Address + 2
Operand Address
Operand Address + 1
$FFFF
1
1
1
0
0
1
1
1
1
1
0
1
1
1
1
1
1
1
1
1
1
1
1
5-8
ASL, ASR, CLR,
COM, DEC, INC,
LSL, LSR, NEG,
ROL, ROR
6
5-9
TST
6
5-10
ADDD, CPX, SUBD
6
*The reference number is given to provide a cross-reference to Table 10-1.
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