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參數資料
型號: NCT7491RQR2G
廠商: ON Semiconductor
文件頁數: 50/80頁
文件大小: 844K
描述: IC REMOTE THERMAL MONITOR 24QSOP
標準包裝: 2,500
系列: *
NCT7491
http://onsemi.com
50
Table 51. TEMPERATURE READING REGISTERS (PowerOn Default = 0x80) (Notes 10, 11, 12)
Register Address
R/W
Description
0x25
R
Remote 1 temperature reading (Notes 12, 13) (8 MSB of reading).
0x26
R
Local temperature reading (8 MSB of reading).
0x27
R
Remote 2 temperature reading (Notes 12, 13) (8 MSB of reading).
10.If the extended resolution bits of these readings are also being read, the extended resolution registers (Reg. 0x76, 0x77) must be read first.
Once the extended resolution registers have been read, all associated MSB reading registers are frozen until read. Both the extended
resolution registers and the MSB registers are frozen.
11.These temperature readings can be in twos complement or offset 64 format; this interpretation is determined by Bit 0 of Configuration Register
5 (0x7C).
12.In twos complement mode, a temperature reading of 128癈 (0x80) indicates a diode fault (open or short) on that channel.
13.In offset 64 mode, a temperature reading of 64癈 (0x00) indicates a diode fault (open or short) on that channel.
Table 52. FAN TACHOMETER READING REGISTERS (PowerOn Default = 0x00) (Note 14)
Register Address
R/W
Description
0x28
R
TACH1 low byte.
0x29
R
TACH1 high byte.
0x2A
R
TACH2 low byte.
0x2B
R
TACH2 high byte.
0x2C
R
TACH3 low byte.
0x2D
R
TACH3 high byte.
0x2E
R
TACH4 low byte.
0x2F
R
TACH4 high byte.
14.These registers count the number of 11.11 ms periods (based on an internal 90 kHz clock) that occur between a number of consecutive fan
TACH pulses (default = 2). The number of TACH pulses used to count can be changed using the fan pulses per revolution register (Reg.
0x7B). This allows the fan speed to be accurately measured. Because a valid fan tachometer reading requires that two bytes be read, the
low byte must be read first. Both the low and high bytes are then frozen until read. At poweron, these registers contain 0x0000 until the first
valid fan TACH measurement is read into these registers. This prevents false interrupts from occurring while the fans are spinning up.
A count of 0xFFFF indicates that a fan is one of the following: stalled or blocked (object jamming the fan), failed (internal circuitry destroyed),
or not populated. (The NCT7491 expects to see a fan connected to each TACH. If a fan is not connected to that TACH, its TACH minimum
high and low bytes should be set to 0xFF.)
Table 53. CURRENT PWM DUTY CYCLE REGISTERS (PowerOn Default = 0xFF) (Note 15)
Register Address
R/W
Description
0x30
R/W
PWM1 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).
0x31
R/W
PWM2 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).
0x32
R/W
PWM3 current duty cycle (0% to 100% duty cycle = 0x00 to 0xFF).
15.These registers reflect the PWM duty cycle driving each fan at any given time. When in automatic fan speed control mode, the NCT7491
reports the PWM duty cycles back through these registers. The PWM duty cycle values vary according to temperature in automatic fan speed
control mode. During fan startup, these registers report back 0x00. In manual mode, the PWM duty cycle outputs can be set to any duty cycle
value by writing to these registers.
Table 54. REGISTER 0x33 PECI0 READING REGISTER (PowerOn Default = 0x80)
Register Address
R/W
Description
0x33
R
PECI0: This register reads the 8 bits representative of PECI Client Address stored in register 0x00
Table 55. PECI LIMIT REGISTERS REGISTER
Register Address
R/W
Description
PowerOn Default
0x34
R/W
PECI Low Limit
0x81
0x35
R/W
PECI High Limit
0x00
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