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參數資料
| 型號： | NCT7491RQR2G |
| 廠商： | ON Semiconductor |
| 文件頁數： | 58/80頁 |
| 文件大小： | 844K |
| 描述： | IC REMOTE THERMAL MONITOR 24QSOP |
| 標準包裝： | 2,500 |
| 系列： | * |
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NCT7491
http://onsemi.com
58
Table 74. REGISTER 0x63 Enhanced Acoustics Register 2 (PowerOn Default = 0x00)
Bit
Description
R/W (Note 25)
Name
<6:4>
ACOU2
R/W
These bits define the maximum rate of change of the PWM2 output. Instead of the fan speed
jumping instantaneously to its newly determined speed, it ramps gracefully at the rate determ-
ined by these bits. This feature ultimately enhances the acoustics of the fan.
Time Slot Increase
Time for 0% to 100%
000 = 1
37.5 sec
001 = 2
18.8 sec
010 = 3
12.5 sec
011 = 4
7.5 sec
100 = 8
4.7 sec
101 = 12
3.1 sec
110 = 24
1.6 sec
111 = 48
0.8 sec
<7>
EN2
R/W
When this bit is 1, smoothing is enabled on the PWM2 output.
25.These registers become readonly when the NCT7491 is in automatic fan control mode.
Table 75. PWM MINIMUM DUTY CYCLE REGISTERS
Register Address
R/W (Note 26)
Description
PowerOn Default
0x64
R/W
PWM1 minimum duty cycle.
0x80 (50% duty cycle)
0x65
R/W
PWM2 minimum duty cycle.
0x80 (50% duty cycle)
0x66
R/W
PWM3 minimum duty cycle.
0x80 (50% duty cycle)
Bit
Name
R/W (Note 26)
Description
<7:0>
PWM duty cycle
R/W
These bits define the PWM
MIN
duty cycle for PWMx.
0x00 = 0% duty cycle (fan off).
0x40 = 25% duty cycle.
0x80 = 50% duty cycle.
0xFF = 100% duty cycle (fan full speed).
26.These registers become readonly when the NCT7491 is in automatic fan control mode.
Table 76. T
MIN
REGISTERS (Note 27)
Register Address
R/W
Description
PowerOn Default
0x67
R/W
Remote 1 Temperature T
MIN
.
0x5A (90癈)
0x68
R/W
Local Temperature T
MIN
.
0x5A (90癈)
0x69
R/W
Remote 2 Temperature T
MIN
.
0x5A (90癈)
27.These are the T
MIN
registers for each temperature channel. When the temperature measured exceeds T
MIN
, the appropriate fan runs at
minimum speed and increases with temperature according to T
RANGE
.
Table 77. THERM
LIMIT REGISTERS (Note 28)
Register Address
R/W
Description
PowerOn Default
0x6A
R/W
Remote 1 THERM
limit.
0x64 (100癈)
0x6B
R/W
Local THERM
limit.
0x64 (100癈)
0x6C
R/W
Remote 2 THERM
limit.
0x64 (100癈)
28.If any temperature measured exceeds its THERM
limit, all PWM outputs drive their fans at 100% duty cycle. This is a failsafe mechanism
incorporated to cool the system in the event of a critical over temperature. It also ensures some level of cooling in the event that software
or hardware locks up. If set to 0x80, this feature is disabled. The PWM output remains at 100% until the temperature drops below THERM
limit hysteresis. If the THERM
pin is programmed as an output, exceeding these limits by 0.25癈 can cause the THERM
pin to assert low
as an output.
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