- 您現在的位置：買賣IC網 > PDF目錄382723 > UJA1065 (NXP Semiconductors N.V.) High-speed CAN/LIN fail-safe system basis chip PDF資料下載
參數資料
| 型號： | UJA1065 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | High-speed CAN/LIN fail-safe system basis chip |
| 中文描述： | 高速的CAN / LIN故障防護系統基礎芯片 |
| 文件頁數： | 25/67頁 |
| 文件大小： | 285K |
| 代理商： | UJA1065 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁當前第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁
9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
25 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
6.8.5.2
LIN dominant clamping
When the LIN-bus is clamped dominant for longer than t
LIN(dom)(det)
(which is longer than
t
TXDL(dom)
), the state of the LIN termination is changed according to
Figure 12
.
6.8.5.3
LIN recessive clamping
If the LIN bus pin is clamped recessive while TXDL is driven dominant the LIN transmitter
is disabled. The transmitter is re-activated automatically when the LIN bus becomes
dominant or manually by setting and clearing the LTC bit.
6.9 Inhibit and limp home output
The INH/LIMP output pin is a 3-state output pin which can be used either as an inhibit for
an extra (external) voltage regulator, or as a ‘limp home’ output. The pin is controlled via
the ILEN bit and ILC bit in the System Configuration register; see
Figure 13
.
When pin INH/LIMP is used as inhibit output, a pull down resistor to GND ensures a
default LOW level. The pin can be set to HIGH according to the state diagram.
When pin INH/LIMP is used as limp home output, a pull up resistor to V
BAT42
ensures a
default HIGH level. The pin is automatically set to LOW when the SBC enters Fail-safe
mode.
Fig 13. States of the INH/LIMP pin
001aad178
INH/LIMP:
HIGH
ILEN = 1
ILC = 1
INH/LIMP:
floating
ILEN = 0
ILC = 1/0
ILEN = 1
ILC = 0
INH/LIMP:
LOW
state change via SPI
state change via SPI
OR enter Fail-safe mode
state change via SPI
OR (enter Start-up mode after
wake-up reset, external reset
or V1 undervoltage)
OR enter Restart mode
OR enter Sleep mode
state change via SPI
power-on
state change via SPI
state change via SPI
OR enter Fail-safe mode
相關PDF資料 |
PDF描述 |
|---|---|
| UL631H256 | SimtekLow Voltage SoftStore 32K x 8 nvSRAM |
| UL631H256S2C35 | SimtekLow Voltage SoftStore 32K x 8 nvSRAM |
| UL631H256S2C35G1 | SimtekLow Voltage SoftStore 32K x 8 nvSRAM |
| UL631H256S2C45 | SimtekLow Voltage SoftStore 32K x 8 nvSRAM |
| UL631H256S2K35 | SimtekLow Voltage SoftStore 32K x 8 nvSRAM |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UJA1065TW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip |
| UJA1065TW/3V0 | 功能描述:網絡控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| UJA1065TW/3V0,512 | 功能描述:CAN 接口集成電路 HI SPEED CAN SYSTEM RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| UJA1065TW/3V0,518 | 功能描述:網絡控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產品:Controller Area Network (CAN) 收發器數量: 數據速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| UJA1065TW/3V0512 | 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP |
發布緊急采購，3分鐘左右您將得到回復。