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參數(shù)資料
型號: UJA1065
廠商: NXP Semiconductors N.V.
英文描述: High-speed CAN/LIN fail-safe system basis chip
中文描述: 高速的CAN / LIN故障防護(hù)系統(tǒng)基礎(chǔ)芯片
文件頁數(shù): 39/67頁
文件大小: 285K
代理商: UJA1065
9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
39 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
6.13.10
Special mode register and special mode feedback register
These registers allow configuration of global SBC parameters during start-up of a system,
and allow the settings to be read back.
[1]
See
Section 6.14.1
.
[2]
Not supported for the 3V0 and 3V3 version.
[3]
Not supported for the 3V0 version.
Table 13:
Bit
15 and 14
13
Special mode register and special mode feedback register bit description
Symbol
Description
A1, A0
register address
RRS
Read Register Select
Value
01
0
1
1
Function
select Special Mode register
read the Special Mode Feedback register
read the Interrupt Feedback register
read the register selected by RRS without writing to the
Special Mode register
read the register selected by RRS and write to the Special
Mode register
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
initialization of Software Development mode
normal watchdog interrupt, reset monitoring and fail-safe
behavior
pin EN reflects the status of the CANFD bits:
EN is set if CANFD = 0000 (no error)
EN is cleared if CANFD is not 0000 (error)
pin EN behaves as an enable pin; see
Section 6.5.2
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
watchdog prescale factor 1
watchdog prescale factor 1.5
watchdog prescale factor 2.5
watchdog prescale factor 3.5
V1 reset threshold = 0.9
×
V
V1(nom)
V1 reset threshold = 0.7
×
V
V1(nom)
[2]
V1 reset threshold = 0.8
×
V
V1(nom)
[3]
V1 reset threshold = 0.9
×
V
V1(nom)
reserved for future use; should remain cleared to ensure
compatibility with future functions which might use this bit
12
RO
Read Only
0
11 and 10
-
reserved
0
9
ISDM
Initialize Software
Development Mode
[1]
1
0
8
ERREM
Error-pin Emulation
Mode
1
0
0
7
-
reserved
6 and 5
WDPRE
[1:0]
Watchdog Prescaler
00
01
10
11
11
10
01
00
0
4 and 3
V1RTHC
[1:0]
V1 Reset Threshold
Control
2 to 0
-
reserved
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UJA1065TW 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip
UJA1065TW/3V0 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0,512 功能描述:CAN 接口集成電路 HI SPEED CAN SYSTEM RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube
UJA1065TW/3V0,518 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
UJA1065TW/3V0512 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP
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