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| 型號(hào)： | UJA1065 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | High-speed CAN/LIN fail-safe system basis chip |
| 中文描述： | 高速的CAN / LIN故障防護(hù)系統(tǒng)基礎(chǔ)芯片 |
| 文件頁數(shù)： | 35/67頁 |
| 文件大小： | 285K |
| 代理商： | UJA1065 |
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9397 750 14409
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Objective data sheet
Rev. 01 — 10 August 2005
35 of 67
Philips Semiconductors
UJA1065
High-speed CAN/LIN fail-safe system basis chip
[1]
This bit is cleared automatically upon each overflow event. It has to be set in software each time the interrupt behavior is required
(fail-safe behavior).
[2]
WEN (in the SC register) has to be set to activate the WAKE port function globally.
6.13.7
Interrupt register
The Interrupt register allows the cause of an interrupt event to be read. The register is
cleared upon a read access and upon any reset event. Hardware ensures that no interrupt
event is lost in case there is a new interrupt forced while reading the register. After reading
the Interrupt register pin INTN is released for t
INTNH
to guarantee an edge event at pin
INTN.
The interrupts can be classified into two groups:
Timing critical interrupts which require immediate reaction (SPI clock count failure
which needs a new SPI command to be resent immediately, and a BAT failure which
needs critical data to be saved immediately into the non-volatile memory)
Interrupts which do not require an immediate reaction (OVERTEMP, Ground Shift,
CAN and LIN failures, V1, V2 and V3 failures and the wake-ups via CAN, LIN and
WAKE. These interrupts will be signalled in Normal mode to the microcontroller once
per watchdog period (maximum); this prevents overloading the microcontroller with
unexpected interrupt events (e.g. a chattering CAN failure). However, these interrupts
are reflected in the interrupt register
3
WIE
WAKE Interrupt
Enable
[2]
1
a negative edge at pin WAKE generates an interrupt in
Normal mode, Flash mode or Standby mode
a negative edge at pin WAKE generates a reset in Standby
mode; No interrupt in any other mode
a watchdog restart during watchdog OFF generates an
interrupt
no interrupt forced
CAN-bus event results in a wake-up interrupt in Standby
mode
CAN-bus event results in a reset in Standby mode; No
interrupt in any other mode
LIN-bus event results in a wake-up interrupt in Standby
mode
LIN-bus event results in a reset in Standby mode; No
interrupt in any other mode
0
2
WDRIE
Watchdog Restart
Interrupt Enable
1
0
1
1
CANIE
CAN Interrupt Enable
0
0
LINIE
LIN Interrupt Enable
1
0
Table 9:
Bit
Interrupt enable and interrupt enable feedback register bit description
…continued
Symbol
Description
Value
Function
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UJA1065TW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:High-speed CAN/LIN fail-safe system basis chip |
| UJA1065TW/3V0 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| UJA1065TW/3V0,512 | 功能描述:CAN 接口集成電路 HI SPEED CAN SYSTEM RoHS:否 制造商:Texas Instruments 類型:Transceivers 工作電源電壓:5 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:SOIC-8 封裝:Tube |
| UJA1065TW/3V0,518 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC HI SPEED CAN SYSTEM RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| UJA1065TW/3V0512 | 制造商:NXP Semiconductors 功能描述:CONTROLLER SYS CAN/LIN 3V 32HTSSOP |
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